[time-nuts] Where does the Z3801A 1 PPS come from?

Mike S mikes at flatsurface.com
Mon Mar 14 07:46:12 EST 2005


At 11:05 PM 3/13/2005, Tom Van Baak wrote...
>I may have done this and will look for the old data. My
>understanding was always that the 1 PPS output was
>tied tightly to the OCXO. I guess I don't buy into the
>idea that the CPU is generating the 1 PPS on its own.
>
>To me, 1 ns agreement between two signals suggests
>it's all hardware-based, not software. But I'd be happy
>to learn I'm wrong.

If you observe the Z3801A power up sequence, after locking to GPS, it does a coarse frequency adjustment if needed, checks for a leap second, does fine freq. adj., then does a phase adjustment before finally going into adj. freq/locked to GPS.

The phase adjustment must be more than just picking which 10 MHz cycle to start a 1PPS counter on, since that would only give 100 ns granularity. I doubt they're playing with forcing the oscillator off frequency to adjust the phase, which leaves using either a dedicated hardware or a software solution.

It reports deltas to 100 ps, and the 58503A spec says 750 ps RMS jitter on the 1PPS (the Z3801A spec of <200 ns is just based on CDMA requirements, and likely has little relation to actual performance, except that it is more than met). What clock speed processor do they use, and what's the minimum instruction cycle time (NOP?)? You would need cycle times on the order of 10 GHz to achieve 100 ps granularity, so it doesn't appear possible for it to be a pure software solution. I doubt any of the CPU electrical signals are even spec'd to less than 1 ns.

This lead me to conclude there's significant hardware external to the CPU involved.

It would be interesting to take a 1PPS TTL signal from one Z3801A (or another source significantly more stable than GPS), and feed it into the GPS 1PPS input of a second (breaking the actual GPS 1PPS connection). That might provide some interesting information on how well a Z3801A can actually measure time intervals. 





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