[time-nuts] Where does the Z3801A 1 PPS come from?

Tom Van Baak tvb at leapsecond.com
Mon Mar 14 12:14:31 EST 2005

> If you observe the Z3801A power up sequence, after locking to GPS, it does
a coarse frequency adjustment if needed, checks for a leap second, does fine
freq. adj., then does a phase adjustment before finally going into adj.
freq/locked to GPS.

Yes, the phase adjustment sequence would be
interesting to watch closely. The answer might
be present in data I gathered for the EFC test:

Here you can see detailed plots of fine frequency
adjustments whose magnitude is on the order of
a few parts in 1e-10. Note that 1e-9 is 1 ns per
second so the possibility of using a temporary
frequency offset to adjust phase by tens of ns
is not ruled out.

> The phase adjustment must be more than just picking which 10 MHz cycle to
start a 1PPS counter on, since that would only give 100 ns granularity. I
doubt they're playing with forcing the oscillator off frequency to adjust
the phase, which leaves using either a dedicated hardware or a software

Let me check that out with actual measurements
similar to the EFC report above. The entire life of
a GPSDO is spent adjusting oscillator frequency
so as to adjust phase relative to GPS. So using
that same architecture to do the initial sync still
seems like a possibility to me.

> It reports deltas to 100 ps, and the 58503A spec says 750 ps RMS jitter on
the 1PPS (the Z3801A spec of <200 ns is just based on CDMA requirements, and
likely has little relation to actual performance, except that it is more
than met). What clock speed processor do they use, and what's the minimum
instruction cycle time (NOP?)? You would need cycle times on the order of 10
GHz to achieve 100 ps granularity, so it doesn't appear possible for it to
be a pure software solution. I doubt any of the CPU electrical signals are
even spec'd to less than 1 ns.

At 100 ps my guess is that the Z3801A uses the
same time interval counter chip as is inside many
of HP's modern bench and VXI counters. These
use time interpolation techniques, not traditional
event and cycle counting using GHz clocks. The
SR 620 uses the same trick.


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