[time-nuts] ATT: Magnus Danielson / Linear Interpolator

[Ulrich Bangert]

Hi Magnus,

in a message from June this year you wrote:

It can be a bit of a challenge to get the FPGA to perform reliably
thought.
You could do a similar thing with a single delay-line but dual clocks of
near
same frequency. That might be a bit more reliable than the dual
delay-line
technique.

I would like to give this method a test. Can you elaborate a bit on this
method or provide a link to where it is explained in more detail?

TIA
Ulrich Bangert