[time-nuts] GPS orthodontics: time averaging theory
Brooks Shera
ebs at wildblue.net
Fri Dec 22 21:42:18 EST 2006
> ----- Original Message -----
> From: "Dr Bruce Griffiths" <bruce.griffiths at xtra.co.nz>
> To: "Brooks Shera" <ebs at mailaps.org>; "Discussion of precise time and
> frequency measurement" <time-nuts at febo.com>
>
> Brooks
>
> Stop fooling yourself try reading:
>
>/Time Interval Averaging: Theory, Problems, and Solutions/, David Chu, HP
>Journal June 1974 pp12-15.
>
>
> Bruce
----------------------------------------------------------------------------
Bruce
Thanks for pointing out the interesting article by Dave Chu. It presents a
fine statistical analysis of the uncertainties associated with time
averaging, especially as it applies to his HP5345A counter design. His
analysis seems to support my controller design as well.
The "pitfalls" Dave mentions are:
PARTIAL PULSE BIAS:
very narrow gated clock pulses are not counted, thereby
introducing a bias as computed in his eq(1). Note that all the parameters
on the right side of eq(1) are constant, thus the bias is constant. A
constant bias is important for a frequency counter or a TIC since all
measurements will be slightly off, but for phase locking it makes no
difference, it just moves the phase setpoint a tiny bit. Forget the
synchronizer.
COHERENCE: if time intervals are repeated at a rate coherent with the
clock frequency, statistical averaging is impaired. Dave's 5375A design
uses random clock phase modulation via a Zener diode noise source to avoid
coherence. I used a cheap 24 MHz xtal drifting clock which is surely
incoherent with GPS.
When I designed my phase detector I was, of course, aware of the coherence
issue and I considered various clock randomizing approaches: a VCXO driven
by a random number generator (but randomness is hard for an VAX, early Bell
Labs UNIX, clearly too much for a PIC), a Geiger counter modulated VCXO
(requires a high voltage PS), etc. The cheap xtal won out. Forget the
coherence issue.
COMPUTE THE QUANTIZATION ERROR: for me, this is the most interesting part
of Dave's paper . His results are summarized in eq(5) in the box on p.15.
For the worst case, when the time interval being measured falls midway
between 2 clock pulses, the rms uncertainty is T/(2 x sqrt(N)), where T is
the clock period, and N is the number of measurements. For the 30 sec
counter readout interval in my design this gives a worst-case rms
uncertainty of 3.8 nsec. For a more realistic integration time of 1000 sec
the rms worst-case quantization uncertainty is expected to be 0.66 nsec.
Dave's eq(5) predicts a much smaller uncertainty when the average time
interval duration is near an integral number of clock pulses. In fact, the
uncertainty is zero when the averaged time interval is exactly an integral
number of clock pulses. As it turns out, that is exactly the situation the
phase lock loop is trying to achieve, an average phase equal to the phase
setpoint - an integer! Dave didn't mention this interesting fact (he was
building a counter, not a PLL). Of course, the PLL does not achieve a
phase
distribution whose average sits exactly on a integer, but it's probably
fairly close and the quantization uncertainty should be significantly
smaller than the worse-case values.
In most cases you can... Forget the quantization error.
Brooks
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