[time-nuts] Conditioning clock signal paths

Magnus Danielson cfmd at bredband.net
Wed Jun 28 13:01:42 EDT 2006

From: <stephan at rrsg.ee.uct.ac.za>
Subject: Re: [time-nuts] Conditioning clock signal paths
Date: Wed, 28 Jun 2006 18:35:09 +0200
Message-ID: <006401c69ad0$d2356eb0$401c9e89 at Stephan>

> Hi Magnus,

Hi Stephan,

> So I guess the verdict is that it is best to band limit your clock signal
> with a low-pass filter. This filter is then still supposed to still allow
> the necessary rise time for adequate PSSR.

That would only solve your problem partly, and also, as you pull your filter
down in frequency you could actually worsen your situation as you lower the
slewrate as you cut away the overtones which contribute to a quick transition.

No, what you have to do instead is to increase the slewrate gain. You basically
want an amplifier to have sufficient linear gain around your trigger point so
that the output of the amplifier is basically slew-rate limited. Any incomming
noise will also be amplified, but as the slope is amplified the time-stretch
they cover at the trigger point is much smaller and hence the noise-induced
trigger-jitter is reduced. Naturally, if you in the process add alot of noise
you can spoil your result.

> Doesn't PCB track impedance do this type of band limiting for you?

Not really. If you have made your impedance-matching you can still get a hell
of a lot of energy up in 5-8 GHz on plain FR4. Actually, it is the losses in
the materials and not the impedance which will eat you at those frequencies,
but you really want to be impedance-matched in order to measure clean waveforms

> Or do you suggest adding a separate RC-stage of some kind?

No. It should be clear by now. ;O)

> The reflections due to impedance mismatch still steers me away from this
> option.

Those can be managed fairly easilly and you will certainly have use for propper
impedance handling from a signal integrity point of view, which is vital for
this type of application anyway.


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