[time-nuts] Allan Deviation -> continuing saga...

Magnus Danielson cfmd at bredband.net
Sat Oct 28 18:12:07 EDT 2006

From: Dr Bruce Griffiths <bruce.griffiths at xtra.co.nz>
Subject: Re: [time-nuts] Allan Deviation -> continuing saga...
Date: Sun, 29 Oct 2006 10:35:44 +1300
Message-ID: <4543CD30.5060207 at xtra.co.nz>

Good Morning Bruce!

> Comparators are fine with a good layout.

As you sharpen up the rise-times, layout becomes more and more important.

> If the input signal is low noise and has a sufficiently high slew at the 
> switching threshold hysteresis is unnecessary.

In this case we are talking about a 10 MHz sine(like) and fairly good
amplitude, so the slew-rate should be good, just in need of the slew-rate
boost prior to hitting those F161s.

> Older ultrahigh speed TTL comparators like the AD9696 and AMD686 have an 
> output stage that is inherently unstable in the transition region.
> If the input to the output stage remained too long in this region the 
> output stage oscillates.

OUCH! Thanks for the heads up!

> Even these work well with a good layout and a nice clean low noise high 
> slew rate input signal.
> Hysteresis is mandatory when using these comparators with low slew rate 
> inputs to maintain stability.

Indeed. However, hysteresis is unfortunatly mistaken for being a cure for
noise-induced jitter. It ain't. Increased gain prior to the hysteresis is.


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