[time-nuts] GPS vagaries and binary interface

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun Oct 29 04:10:31 EST 2006


Didier Juges wrote:
> Dr Bruce Griffiths wrote:
>   
>> Didier
>>
>> Alternative GPSDO solution
>> Divide the 10MHz reference by 32 resync the output to 10MHz with a fast 
>> D flipflop and then divide the D flipflop output by 4 using a 2 bit 
>> switchtail ring (Johnson) counter.
>> Low pass filter the outputs of both divide by 4 counter flipflops with 
>> identical filters.
>>   
>>     
>
> OK, I follow even if I am not sure where this is leading...
> Anything magic about 32, other than it's probably the smallest division 
> that may not immediately result in rollover when the OCXO is cold?
> Based on yesterday's experiment, my OCXO rolled over once while warming 
> up with a division ratio of 128. A few more chips are not a real 
> problem. I like the 74F161, they are fast and synchronous. If I could 
> find 74F162's, that would be the best, or I can program the 161s as 
> decade counters, but it's more work.
>
>
>   
>> Use ACMOS flipflops in the ring counter so the sine wave output 
>> amplitude is reasonably stable.
>>   
>>     
>
> Of course, TTL outputs are anything but stable.
>   
>> This should produce 2 nominally quadrature sinewave outputs at (10/128) MHz.
>> Use 2 12 bit ADCs (eg AD7942) to sample the 2 quadrature sinewaves on 
>> the leading edge of the GPS receiver PPS signal.
>> The ADC readings can be processed to derive the phase angle at the PPS edge.
>> A resolution of 10ns or better is readily achieved. This is more than 
>> adequate for most current GPS receivers.
>> If you are worried about the stability of the low pass filter phase 
>> shifts just use another pair of ADCs to sample the 2 sinewaves at 10/128 
>> MHz.or a submultiple thereof.
>> The difference between the 2 phase angles will be independent of the 
>> filter phase shifts.
>>
>>   
>>     
> That would be a software interpolator?
>
> I like that approach because it reduces the hardware to a relative 
> minimum, compared to the Brooke Shera approach, and puts the complexity 
> in software.
>
> Regarding your next message recommending to use a dual channel ADC, I 
> agree, even though it may be simpler to use S&H devices with the 
> built-in multiplexed ADC of the microprocessor. I have a few monolithic 
> Burr Brown devices that have a small aperture gate, I forgot how much.
>
> This sounds very interesting, but it won't be an evening project :-)
> I don't do PICs (no development tools, no code bank). I do not have the 
> tools to do PLDs either. My favorite uCs are 8051s, particularly the 
> Silabs parts. I also have access to a good C compiler and I have written 
> a lot of 8051 code. I do not know how these parts fare as timing chips. 
> They are plenty fast though, some run at a 100 MHz clock, with many 
> instructions taking one clock.
>
>   
>> Bruce
>>
>> _______________________________________________
>>
>>   
>>     
> Thanks again for many thought provoking ideas.
>
> Didier
>
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>   
Didier

 Nothing too critical about divide by 32.
A quadrature phased sinewave pair frequency of about 100 KHz is about 
the lowest with which its possible to achieve a resolution of better 
than about 10ns with a relatively inexpensive 12 bit ADC. The period of 
the reference sinewave has to be large enough to accomodate the GPS 
receiver PPS jitter and the OCXO wander whilst locked over the loop time 
constant (~ 1000 sec).

Doing PLDs is easy just choose one that can be programmed over a JTAG 
interface.
Bit banging on a PC parallel port can then be used to program the PLD in 
circuit.
A simple interface (1 chip) between the parallel port and the JTAG port 
is required.
That only leaves the software to find.
Of course if you forgo correcting for harmonics and dc offset then the 
logic complexity is reasonably small.
Easily implemented using readily available CMOS chips.

It doesn't really matter what processor you use as long as its fast 
enough to do the job with some margin to spare for enhancements.
Even the 8051 chips of 25 years ago are probably fast enough.

The reason I didn't suggest sample and holds to do the simultaneous 
sampling is that its difficult to get high performance standalone sample 
and holds these days.
Its just more cost effective to use a pair of ADCs.

Bruce



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