[time-nuts] Allan Deviation -> continuing saga...

[Richard H McCorkle]

I had been using the Shera HC4046 input circuit for my 10811
GPSDO input until I read the test results in the LPRO manual
http://www.symmetricom.com/media/pdf/manuals/man-lpro.pdf
(Table 3-1 on Pg 18) showing the results of testing various TTL
converters for relative phase noise. The conversion techniques
document at http://www.wenzel.com/documents/waveform.html
has a circuit for using a tuned LC network to increase the sine
output from an oscillator to drive a biased gate input. I did some
testing of my own and found that using a biased AC04 gate using
the Wenzel circuit with no input resistor, C = 100pf, L = 2.7uh,
input directly from the 10 MHz 10811 gave the lowest phase noise
combination for my GPSDO input.
You may want to give this a try.

Enjoy!
Richard

----- Original Message ----- 
From: "Didier Juges" <didier at cox.net>
To: "Discussion of precise time and frequency measurement"
<time-nuts at febo.com>
Sent: Saturday, October 28, 2006 4:21 AM
Subject: Re: [time-nuts] Allan Deviation -> continuing saga...


> John Ackermann N8UR wrote:
> > To minimize jitter and tempco, you probably ought to stay away from a
> > comparator if you can.  I've had good success using the input circuit
> > from Brooks Shera's GPSDO which is a 74HC4046 PLL, but using only the
> > input circuit and not the PLL section itself.  Alternatively, you might
> > get away with a simple capacitor followed by 50/50 voltage divider to
> > provide 1/2 Vcc bias going to the input of the divider chip.
> >
> > John
> >
> >
> It makes sense, even though it is counter-intuitive (to me). I have
> always tried to put comparators or schmitt triggers in front of logic
> gates because of the risk of metastability. I would have thought the
> 4046, using a relatively slow CMOS process, would have been offering
> more jitter with an analog signal than with the output from a fast
> comparator as the AD8561 (7nS delay, which changes by a small fraction
> of a nS from 25 to 50 degree C)
>
> I will try to spend some time with the AD8561 data sheet. Considering
> that I am driving it with a clean 2Vp-p sine wave with zero DC offset, I
> should be able to quantify the noise of that stage.
>
> Alternately, Bruce recommended a CMOS Schmitt Trigger, so that's 2 for
> that solution since I believe that's what the input stage of the 4046
> is. I am going to have to dive into my parts bin again...
>
> Didier
>
>
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