[time-nuts] Time interval interpolation by sampling a pair of sinewaves in quadrature.
Dr Bruce Griffiths
bruce.griffiths at xtra.co.nz
Tue Sep 26 07:42:51 EDT 2006
Yet another high resolution time interval interpolation technique is to
sample a pair of quadrature sinewaves at the leading edge of the pulse
to be time stamped.
When sampling a pair of 10MHz sinewaves in quadrature with a 12 bit ADC
a timing resolution of better than 50 picosec is possible.
With a pair of 1MHz sinewaves in quadrature a timing resolution of
better than 500 picosec is possible.
The only difficulty is in deciding which cycle was sampled.
Either a sequence of progessively lower frequency quadrature sinewave
pairs can be sampled, or the output of synchroniser can be used to
sample both the quadrature sinewave pair and a counter clocked at the
synchroniser frequency. The worst case synchroniser delay must be less
than the sinewave period.
The phase relationship between the synchroniser (and counter) clock and
the quadrature sinewave pair need not have any particular value nor have
a low temperature coefficient.
A 3 or 4 stage synchroniser clocked at 10MHz has a worst case delay of
about 500 ns which is adequate for a 1MHz quadrature sinewave pair.
The sinewaves can be generated by dividing the 10MHz by 10 using a low
phase noise divider such as a 74AC161/3 followed by a low pass filter.
A 90 degree phase shift can be produced by a 250ns delay line. Other
techniques can also be used to generate the required phase shift.
A single sinewave can be used if a pair of samples are taken 1/ 4 period
apart.
A microprocessor is used to calculate the phase angle at the sampling
instant from the pair of quadrature samples and combine this with the
sampled count to produce a high resolution time stamp.
The prevalence of pipelined high frequency ADCs with which it is
difficult (but not impossible) to take a single sample makes it
difficult to apply this technique to sample high frequency sinewaves.
However if one uses a gated delay line timed oscillator to generate the
sampling clock it is possible to isolate the required sample pair with
some additional logic.
With a 1MHz sinewave suitable ADCs are readily available.
The harmonic content of the reference sinewaves must be low.
This is easily achieved by filtering.
Quadrature phasing errors can easily be calibrated and corrected in
software.
Minor variations in the reference sinewave amplitude have little effect,
although the quadrature pair should have the same amplitude.
sampling a single sinewave 1/4 cycle apart eliminates the requirement
for equal amplitude sinewaves.
Bruce
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