[time-nuts] 10MHz to 32MHz?

Don Collie donmer at woosh.co.nz
Mon Apr 23 03:56:10 EDT 2007


I have learned the hard way that the 4046 needs input signals whose 
risetimes [and falltimes?] are not too long , and It`s probably best to use 
the inhibit function, and avoid using the source follower. The output 
resistance can then be absorbed into the first resistor of the loop filter, 
outside the package. I`ve played around with the 4046B, and have built a 
synchroniser to overcome thermal drift in a signal generator that I own. 
Funny thing is, even a 15.625Hz [ie 15Hz approx] frequency at the phase 
detector is quite sufficient to practically eliminate thermal frequency 
drift, and  with a long loop time constant, the output signal, when mixed 
with another steady frequency, sounds very clean. Lockup time is a couple of 
seconds or so. Lots of fun. The thing that puzzles me is: why is the plot of 
VCO voltage versus time different when locking from below to locking from 
the same initial frequency difference when locking from above. It`s a pity 
you can`t predict PLL lockup characteristics using linear algebra - or do 
you need a particular kind of phase [or frequency] detector that would 
enable you to do this?
FWIW, 
Cheers!..............................................................................Don 
C.



   To: "Discussion of precise time and frequency measurement" 
<time-nuts at febo.com>
Sent: Monday, April 23, 2007 3:24 PM
Subject: Re: [time-nuts] 10MHz to 32MHz?


>
>
>> Hi John,
>>
>> talking about 4046 PLL's: we are looking for a better Spice model
>> for the
>> 4046 PLL, but only found an HC4046 model in Pspice. That part is
>> too slow.
>> Would you have a pointer to a better chip such as the 74HC4046  etc?
>>
>> thanks,
>> Said
>
> Not sure; I've never used any SPICE other than LTSpice, and never tried to
> use a 4046 in it.  I'll bet they have a model for it somewhere, though.  I
> would think you could just play with the propagation delay values in the
> HC4046 model to make it work with any other logic family.
>
> I've built a ton of PLLs with the PLLatinum and Analog Devices chips, but
> only one with a 4046.
>
> -- john, KE5FX
>
>
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