[time-nuts] Fury Realhamradio listing

Magnus Danielson cfmd at bredband.net
Sun Apr 29 20:21:22 EDT 2007


From: Dr Bruce Griffiths <bruce.griffiths at xtra.co.nz>
Subject: Re: [time-nuts] Fury Realhamradio listing
Date: Mon, 30 Apr 2007 11:38:26 +1200
Message-ID: <46352C72.6050204 at xtra.co.nz>

> SAIDJACK at aol.com wrote:
> > In a message dated 4/29/2007 04:13:30 Pacific Daylight Time, 
> > cfmd at bredband.net writes:
> >
> >     >Indeed. Three-four transistors and a handfull of caps and
> >     resistors. The
> >     >Z3801A uses the 10 MHz clock and thus require a x1000
> >     interpolation, which is
> >     >easy enought to acheive. Look at the HP5335A service manual for
> >     further
> >     >details. What you do is that you stretch the error-pulse (1-2
> >     cycles) by
> >     >charging a cap with one current and discharging it with another,
> >     the output is
> >     >then run into a comparator for the sake of gain. This stretched
> >     pulse is then
> >     >measured with the coarse clock and voila!
> >
> > Hi Magnus,
> >  
> > I respectfully disagree, if it was that easy to get 100ps _accuracy_ 
> > and resolution, then the 53132A would have it and not 150ps I would 
> > think.
> >  
> >
> > bye,
> > Said
> Said
> 
> Try studying a little history, its been possible to achieve 25 
> picosecond accuracy and resolution for over 30 years.
> Such resolution is routine in Nuclear instrumentation. State of the art 
> nuclear instrumentation strives for subpicosecond resolution and accuracy.
> 
> The reason that the 53132A doesn't have resolution and accuracy better 
> resolution than 150ps, is that a design choice was made to implement it 
> all (counters plus interpolators) in a CMOS chip using the delay of a 
> CMOS inverter to set the resolution. This reduces the cost and 
> complexity significantly and allows faster cycling of the interpolator 
> facilitating continuous operation with zero deadtime between 
> measurements. The drawback is reduced resolution and the requirement for 
> frequent calibration or the use of a delay lock loop to correct the for 
> the CMOS inverter delay tempco.

Ironically, a variant of this analog interpolator technique in combination with
modern FPGA technology is now taking the busniess away from the 53132A.

There are many different reasons why a certain choice of technology is being
made, and not all of them is down to resolution and accuracy. Also, if that
would be the problem, a x1000 lever should not be used but rather a lower
lever like x100 but to a higher clock, and this is infact what more modern
instruments than the HP 5335A does (it uses x100 to acheive 1 ns). One
particular flaw of HP 5335A and several others like it is that the reference
pulses used to calibrate it isn't used to tune it into place but only to
compensate it. A small DA Converter (8 bit would certainly suffice) would have
allowed them to trim up the interpolator scale. Due care would have allowed
them the linearity needed, but for lower lever-rates this is not as much a
problem unless you intend to average alot. If you do want that you want a
higher resolution and then calibrate it up to create a look-up-table correction
which is infact what several more advanced solutions do. I think I have done
quite a bit of homework on these things, but I do not claim to know it all, I
am still attempting to be a humle and good student. My biggest problem is that
I don't have the time to do the experiments that I should do.

The delay-chain interpolator technique was an attempt to get away from complex
and in need of trimming analogue designs. Just look at the HP 5371A and
HP 5372A, but they need trimming too. It is certainly interesting in the form
of CMOS design. However, unless you do full-custom (with the pricetag that gets
you), it is not the best technique to use. The analog interpolator technique
in either the pulse-stretcher form or ADC form gives alot of bang for the buck
once you come of the head-end part of things.

Cheers,
Magnus



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