[time-nuts] SRS SR620 External Source Issue -- Help Request

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Wed Feb 21 19:47:44 EST 2007


Hej Magnus

The Frequency measurement logic (before the interpolators) appears to 
use a pair of 2 bit synchonisers, one for the rising edge and one for 
the falling edge of the internally generated frequency gate. The 
synchronisers synchronise the respective transitions of the frequency 
gate signal to the external frequency being measured.
One synchroniser uses U508A + U509A the other uses U508B + U509B, so 
that any mismatch in propagation delays between U509A And U509B will 
result in a small error in the time interval. Even for ECL flipflops a 
propagation delay difference between U50(A and U509B of 150ps wouldn't 
be unusual. As far as I can tell the calibration procedures do not 
address this issue.  The uncalibrated differential delay through the 
interpolation circuit source selection multiplexer will also contribute 
an offset.
Perhaps a better assignment of propagation delay differences may be 
U509A and U509B 50ps, multiplexer and wiring delay mismatches 100ps.

Bruce



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