[time-nuts] Austron PRR-10 GPS discliplined Rb...

[Hal Murray]

> 	Of course for phase comparison with the input, one actually does not
> need much filtering as one is only using the NCO digital output as an
> input to a phase comparator... spurs and so forth don't count at all
> here as they get filtered out in the subsequent loop filter for the
> PLL (which is very narrow). 

I don't understand this area well enough.  Can somebody give me a few (more) 
hints?

Are we talking analog filters in hardware or software filters in a small CPU?

How narrow an analog filter can I purchase or make?  (at reasonable price or 
board space or design time or whatever)

How close do the spurs get?  I thought they got quite close if the DDS 
parameters were close to a good frequency.  Do they get smaller as they get 
closer, or something convenient like that?

What's the term for the set of frequencies that a DDS can make with no spurs? 
 Say with a divide by 8.  I'm guessing that the criteria for that is 
something like
no bits left on in the low bits when the carry out of the low bits happens.  
By low bits I mean the ones the A/D doesn't see.


> I presume that the leading edge of the GPS receiver PPS pulse samples
> the DDS phase accumulator register content. 

That would be easy if the DDS were built in an FPGA.  (There is the 
synchronizer delay to complicate things, but that and other pipeline stages 
are just a constant offset.)



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