[time-nuts] Troubleshooting SR DG435 Four Channel Digital Delay/Pulse Gen
Dr Bruce Griffiths
bruce.griffiths at xtra.co.nz
Tue Jul 3 00:30:55 EDT 2007
Brooke Clarke wrote:
> Hi Bruce:
> The common pin has a 100 ns period wave at + and - 500 mv.
> One of the center pins on the INT/EX switch had + and - 1 volt at 100 ns period.
> Have Fun,
> Brooke Clarke
The 10MHz level translator for the MC12040 probably looks something like
the posted schematic, basically a longtailed pnp pair that translates a
sinwave (or TTL) input to differential ECL levels.
The base of Q2 may be biased at 1,4V or so to translate TTL level from
the on board oscillator or GND for a sinewave input. Supply voltages may
vary but essentially the collectors should produce complementary ELC
level signals one of which is used to drive the MC12040. Details may
differ but essentially one collector will produce an ECL output to drive
Check the voltage waveforms on the MC12040 pins 6 and 9.
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