[time-nuts] NIST frequency doubler
Dr Bruce Griffiths
bruce.griffiths at xtra.co.nz
Mon Jul 9 21:32:55 EDT 2007
To give some idea of the transformer ratios required a simulation using
pSpice shows that:
When using 2 x 2N4393's connected in parallel (limited choice of JFETs
available) for each JFET in the NIST circuit, an input transformer with
a 1:2 turns ratio with centre-tapped secondary and an output with a 2:1
turns ratio is about optimum. Input is fed from a 5MHz 2Vrms source
with a 50 ohm source impedance (develops 1V rms in a 50 ohm load) source
resistor is 100 ohms. Input transformer primary magnetising inductance
was 50uH. Output transformer secondary magnetising inductance was 50uH.
Output is 1V rms into a 50 ohm load. Output transformer primary dc
current is ~ 20mA.
To allow adjustment for individual FET characteristics the input
transformer secondary centre tap can be grounded and a capacitively
bypassed resistor connected in series with the source of each JFET. The
resistor values are then selected/adjusted to achieve the desired output
and minimise the fundamental component in the output. Trimpots can be
used, initially adjust the trimpots to the required value whilst the
specified input is applied, then measure each trimpot's resistance
setting and replace it with a fixed resistor.
Since JFETS have a relatively large spread in characteristics individual
adjustments are required.
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