[time-nuts] NIST frequency doubler

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Tue Jul 10 00:34:13 EDT 2007

SAIDJACK at aol.com wrote
> Thanks for the info Bruce, Magnus,
> I will be reading the Felton paper to get more info.
> With a bit of trickery, I bet this circuit can be used with Bipolar  
> transistors.
> bye,
> Said

You mean like the circuit in the attached file?
Input transformer configuration is the only way I can simulate a 
centre-tapped transformer.
1 ohm resistors are merely present to keep the simulator happy with 
transformer primaries connected in parallel.

The circuit is far more predictable than the JFET version, however there 
is no data on the close in phase noise performance.
Whilst this circuit will work with the 2N3904's shown, with higher ft 
transistors the emitter base reverse voltage ratings may be exceeded.

At least with JFETS the gate source reverse breakdown voltage is 
relatively high.


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