[time-nuts] PLL question

Ulrich Bangert df6jb at ulrich-bangert.de
Mon Aug 10 12:49:53 UTC 2009


> ...I must admit, the tri-state PC did look good 
> too until you pointed out the dead zone. I had assumed this 
> would be insignificant, but of course it can't be. I'll still 
> try the 74HC7046, but use the XOR PC instead.

How about switching between the 4046's phase detectors, once the PLL has
locked?

Or using a phase comparator like the AD9901 which has a "no dead zone" XOR
phase comparator coupled with a frequency comparator? 

The later one can easily be put into a small cpld if you like.

Best regards
Ulrich Bangert 

> -----Ursprungliche Nachricht-----
> Von: time-nuts-bounces at febo.com 
> [mailto:time-nuts-bounces at febo.com] Im Auftrag von gonzo moto
> Gesendet: Montag, 10. August 2009 14:39
> An: time-nuts
> Betreff: [!! SPAM] Re: [time-nuts] PLL question
> 
> 
> 
> > Date: Fri, 07 Aug 2009 18:35:12 +0200
> > From: Magnus Danielson <magnus at rubidium.dyndns.org>
> > 
> >~
> > If possible, keep the comparator frequency fairly high and avoid
> > charge-pump detectors (according to my experience with 
> cheaper-tronic 
> > onces where dead-band created low rate wanderings while 
> simple designs 
> > excelled in stability).
> > 
> > Using a low phase-noise oscillator for cleanup is a wise 
> idea, even if
> > no frequency multiplication occurs. Active loop PI-regulation of 
> > sufficient bandwidth suppresses most of frequency trackings of the 
> > oscillator, so long-term stability is less of an issue where as 
> > phase-noise plots are.
> > 
> > Cheers,
> > Magnus
> 
> Hi Magnus,
> playing with my prototype (using a 74AC86 XOR) showed that 
> the lock-up time varied from 30sec to almost 5min. Because of 
> this variation, I decided to use a 74HC7046 because of it's 
> 'lock detect'. I must admit, the tri-state PC did look good 
> too until you pointed out the dead zone. I had assumed this 
> would be insignificant, but of course it can't be. I'll still 
> try the 74HC7046, but use the XOR PC instead.
> 
> 
> 
> >------------------------------
> >
> >
> >
> >Date: Fri, 07 Aug 2009 10:44:42 -0600
> >From: Ed Palmer <ed_palmer at sasktel.net>
> >
> >
> >Which software version do you have, NMEA or Motorola?  If 
> you have the
> >
> >NMEA version another question pops up:  Should you do the division
> >
> >externally, or program the unit to directly put out the lower 
> >frequency?
> >
> >
> >
> >Ed
> >
> 
> Hi Ed,
> I have the NMEA version.
> If the decision was to run the PLL (PC) at less than 10MHz, 
> (as per my first build), I've run each signal through half a 
> 74HC390. I hopped this would avoid any device-to-device 
> variation and any device introduced error would be consistent 
> in both signals.
> 
> >------------------------------
> > Date: Fri, 07 Aug 2009 10:52:17 -0600
> > From: Ed Palmer <ed_palmer at sasktel.net>
> > 
> > Navsync doesn't really call it a synthesizer, they call it a 
> > Numerically
> > Controlled Oscillator (NCO).  My tests suggest that they're 
> doing what 
> > others have done on the 1 PPS output - change the state of 
> the 10 MHz 
> > output (high to low or vice versa) on a transition of their 
> internal 120 
> > MHz clock.  This means that you occasionally get a pulse 
> that's ~8 ns 
> > shorter or (presumably) longer than normal.  My unit puts 
> out a short 
> > pulse about 200 times per second.  Navsync has an app note 
> where they 
> > say that for some applications a phase-locked cleanup 
> oscillator will be 
> > required.
> > 
> > Ed
> 
> Thanks again Ed, I was unaware of the occasional distorted pulse.
> 
> 
> In case anyone has noticed, there is an ebay seller in 
> Calgary listing some CW12s. I do not believe these are the 
> NMEA version and his price (for used units) is 30% over retail.
> 
> 73
> ian
> 
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