[time-nuts] Advantages & Disadvantages of the TPLL Method

[WarrenS]

Bob

>> Don't know if I can explain it to you, I'm not so good at explaining, 
>> I'll give it  *ONE*  try.
>> Example with some random picked numbers (JUST TO SHOW THE MAIN POINTS).

I tried,
All information and test  that are available on the TPLL is on JOHN'S KE5FX 
site or in past postings.
http://www.thegleam.com/ke5fx/tpll.htm

One other thing I may not of made clear, The analog averaging thing does not 
help at low freq like at 1 PPS
The TPLL works great because it is at a high freq like 5 or 10 MHz.
DAQ == DataQ == ADC

> I don't think 10ps is achievable under any dynamic conditions IMHO
OK, I don't really care, use whatever number you want, you'll still end up 
below the Ref osc noise.
but
You may be surprised then by what the single shot "Aperture uncertainty" 
specs are for the kind of devices that really care about this sort of thing.
But then none of that really maters AT ALL,
because there is NO Digital anything in the simple TPLL before the ADC where 
a 10 Hz device would work fine for most.
I just gave you an example to try and answer your question on digital logic 
which was:
> How do you do fs when most digital logic has jitter several of orders of 
> magnitude greater?

ws

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[time-nuts] Advantages & Disadvantages of the TPLL Method
Robert Benward rbenward at verizon.net
Sat Jun 19 03:18:05 UTC 2010

Warren,
Is there not a lower limit to how much you can average?  Yes, it's the sqrt 
of the number of samples, but doesn't noise,
hardware, and other perturbations limit the usefulness of this method?

> Then one can get repeatable results say 100 times better from cycle to 
> cycle in the short term.
> so down to 10ps repeatable.

Why do you say the results are repeatable in the short term vs the long 
term?  Isn't what you defined above
(repeatability) the opposite of jitter?  Jitter I thought was cycle to cycle 
variation in prop delay.  On 1ns prop
devices, I don't think 50-100ps jitter is unreasonable under the most 
optimum conditions, the most careful circuit
layout, and constant repeatable inputs.  I don't think 10ps is achievable 
under any dynamic conditions IMHO.

> One can average 1,000,000 readings of the 10 ps jitter
> If they are truly random, that can give you a 1e-3 improvement (square 
> root of number of samples averaged)

You are now averaging the "repeatable"  jitter.

KE5FX's website shows a diagram and a link to your diagram as well.  Are you 
using a digital phase detector or a mixer
as shown?  BTW, KE5FX refers to DAQ as your update to the design, where I 
believe he meant an ADC.

You have my curiosity peaked.  Do you have an analysis of the loop 
sensitivity/resolution?

Bob


----- Original Message ----- 
From: "WarrenS" <warrensjmail-one at yahoo.com>
To: "Discussion of precise time and frequency measurement" <time-nuts at 
febo.com>
Sent: Friday, June 18, 2010 6:49 PM
Subject: Re: [time-nuts] Advantages & Disadvantages of the TPLL Method


> Bob posted
>>can you explain it to me?
>
> Don't know, I'll give it ONE try.
> I'm not so good at explaining, but it is pretty basic if one does not 
> start assuming that it can not be done at the
> start.
> It is mostly about averaging lots of those transitions, and the real trick 
> is that it is not Digital.
> Analog has no lower limits except manly for Johnson noise type effects 
> (mostly).
>
> Example with some random picked numbers.
> and assuming all analog that has no digital steps in it to limit 
> resolution or add noise.
>
> Say you have a nice logic gate with 1 ns delay
> If you make it all nice and clean, and repeatable such as constant PS, 
> rise time etc.
> Then one can get repeatable results say 100 times better from cycle to 
> cycle in the short term.
> so down to 10ps repeatable.
> Now make things even more clean with no variations and assuming random 
> noise.
> Now if one is doing this at 10 MHz and only cares about the average over 
> 0.1 sec (10 Hz)
> One can average 1,000,000 readings of the 10 ps jitter
> If they are truly random, that can give you a 1e-3 improvement (square 
> root of number of samples averaged)
> so now down to 10 fs of average jitter at 10 Hz for a 10 MHZ gate starting 
> with a 1ns initial delay.
>
> OF course if Anything changes at all, it will drift much more than that, 
> which may or may not mater much depending on
> what one is doing.
> If you only really care about the difference between any two consecutive 
> 100 ms reading that are next to each other,
> as is (mostly) the case in ADEV, then not a big deal.
>
> IF it does matter or you want to do better, the next step is to do it all 
> differential, so you are looking at only the
> different of two separate independent but equal circuits. Differential can 
> give, say a 1000 to one or better
> improvement in drift due to common things such as temperature etc.
>
> If that helps explain the basics, good, if not you need to ask others to 
> explain it better.
>
> And yes there all kinds of things that can & do go wrong and many ways to 
> screw it up.
> so as easy as it sounds, it does take a bit of skill and art to do it.
> Especially when one realizes that you are measuring things << 0.001 in of 
> distance change will have major effects on
> because of the speed of light.
> (approx 1ft /ns, 0.01 in/ps, 1 micron/4fs)
>
>
> Now if one starts out, not with a gate but a phase detector that is made 
> for such things, and averages enough (but not
> to long) and is real careful,
> 1fs resolution is possible in the 100 Hz range with 10 MHz
>
> 10 MHz & 1fs at 100 Hz gives 1e-13 freq variation resolution at tau 10ms
> The simple BB TPLL is only getting about a tenth of that, (as shown on 
> John's test plots)  so it can be made much
> better with enough care, if anyone has a ref osc that needs it.
> But as I am always so quick to point out, the BB tester was not optimized 
> for any one thing, It's performance was
> selected as a compromise for 'KISS' reasons.  (KISS = Keep It Simple so 
> the experts can understand.)
>
> please let me know on or off line if I'm wasting my time trying to explain 
> this to the non "nut experts" without the
> help of the fancy math papers.
>
> ws
>
> *********************
> [time-nuts] Advantages & Disadvantages of the TPLL Method
> Robert Benward rbenward at verizon.net
> Fri Jun 18 20:23:40 UTC 2010
> Previous message: [time-nuts] Advantages & Disadvantages of the TPLL 
> Method
> Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
>
> Warren,
> I'm a newbie, so can you explain it to me?  Femto anything is something
> mostly reserved for a well equipped lab.  How do you do it when most 
> digital
> logic has jitter several of orders of magnitude greater?
>
> Bob
>
> *************************