[time-nuts] yet another GPSDO design, or so

Said Jackson saidjack at aol.com
Sun Jun 27 09:24:31 UTC 2010


Moin-Moin Atilla,

The 4002 expects a tight phase lock on the two inputs to properly stay locked, and your adc/dac will likely introduce too much phase lag and cause oscillation. In fact when using the Analog Devices PLL simulator one has to closely follow the component values of the loop filter that the software suggests otherwise the system won't be stable, unless you do a lot of manual math. The 4002 works well with loop bandwidths of 30 Hz or more.

For a GPSDO you are looking for loop bandwidths of 0.001Hz or less, a totally different world. Even if you use the 10 Mhz output rather than the 1 pps. This is because your Isotemp Ocxo will be much more stable than the gps for short time intervals, say 0.1s to 500 s

What would be easier to try is to replace the gps internal Tcxo with an external ocxo, but you have to generate the frequency the gps is using, such as 26 MHZ and do some soldering on the gps itself.

It would be very interesting to see just how good the uBlox lea-6t can work with an ultra stable frequency source rather than a $5 tcxo..

Bye,
said



Sent from my iPad

On Jun 26, 2010, at 10:15, Attila Kinali <attila at kinali.ch> wrote:

> Moin,
> 
> I recently had a look at the data sheet of the LEA6-T GPS module
> from ublox, which now features a second time pulse output that
> is capable of delivering a 10MHz signal, synchronized to GPS.
> 
> After thinking quite some time quite some time about building
> my own GPSDO and struggling with the question how to synchronize
> a 10MHz signal to a 1Hz signal that has some substantial phase
> noise, the new LEA6-T module seems like to make things a lot
> easier. Although the LEA6 specs do not say anything about how
> the timepulse output is generated or how it is synchronized
> to GPS, i assume that it will either have some jumps or phase/frequency
> noise due to oszillator and synchronization imperfections.
> 
> But, it should be possible to use the LEA6-T together with
> some OCXO and a PLL setup to stabilize the OCXO to get a high
> quality frequency standard.
> 
> Unfortunately, my knowledge in that field is rather limited, thus
> before starting to make wrong design decisions i'd like to ask
> for some advice here.
> 
> My basic idea is to feed the 10MHz output of the LEA6-T and
> the 10MHz OCXO into a current output PFD, do some low-order
> filtering of the output signal. Feed that into an ADC which
> is read by a uC which in turn controls an DAC that sets over
> some amplifier stage the EFC input of the OCXO.
> 
> As PFD i thought about using a ADF4002 from Analog, which
> is actually an PLL, but allows to bypass the input dividers,
> so that it can be used as pure current output PFD.
> 
> I'm not yet sure what kind of output filter i want to use.
> I probably have to add at least one low noise opamp there,
> to isolate the PFD output/filter from the ADC. I'm also
> not sure what filter frequency i should use here. It will
> have to be below 10MHz for sure, probably in the lower 
> kHz range, but how low is the question. The lower the easier
> gets the ADC stage and the less work has to be done in the uC,
> but using a low frequency filter either means using an active
> filter (noise) or high value R or L (again noise, especially
> the L might couple in 50Hz noise from the enviroment or show
> microphone effects).
> 
> The ADC will be either a low-noise 16bit type or a 24bit
> type. This will largely depend on the sample rate to be
> used and the availabilty of the ADCs. Any good advices
> on what to use here? Should there be some form of signal
> conditioning done? If, what form of conditioning would
> you advise me to use?
> 
> As a uC i thought about using a AT91SAM7 variant from Atmel.
> I know these beasts (and their bugs) pretty well by now
> and already have some code ready for those.
> I thought about clocking the uC with a 40MHz crystal that
> is synchronized to the 10MHz OCXO using a PLL. This would
> allow me to generate quite precise+accurate digital signals.
> Unfortunately, there doesnt seem to be VCXOs at 40MHz available
> so that means that i'd have to build one by hand.
> 
> The loopfilter is going to end up in the uC as it is easier
> to build such low frequency filters digitally than in analog.
> I havent put much thought into how that filter should look
> like, as this can be easily changed later.
> 
> The DAC will probably be a 16bit type (there does not seem
> any higher resolution DAC with sane specs and still reasonable
> availability). The amplifier for the DAC output will be a two
> stage amplifier. One stage that adds an (adjustable) offset
> and one stage that adds the (again adjustable) amplification.
> This approach is choosen as the needed EFC range will probably
> much lower than the full range. Hence the resolution of the
> DAC can be enhanced by producing only values within that range.
> The disadvantage here is that it requires calibration.
> 
> A rough guestimate is that the whole thing will probably cost
> less than 500CHF (including PCB production, but excluding OCXO).
> Yes, i know, i could get a Rb frequency standard for that money
> on ebay. But where is the fun in that? ;-)
> 
> Beside whether this setup makes sense, the two biggest questions
> i have are, what OCXO to use. Are the ISOTEMP 134-10 that are
> available on ebay "good enough" for such an application?
> Or shall i look for something better/different?
> 
> And the other is, how do i amplify and distribute the 10MHz
> signal i get out of the OCXO to be used by other devices
> with minimal phase noise?
> 
> 
> Thanks for your help
> 
>            Attila Kinali
> 
> -- 
> If you want to walk fast, walk alone.
> If you want to walk far, walk together.
>        -- African proverb
> 
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