[time-nuts] yet another GPSDO design, or so

Bob Camp lists at rtty.us
Tue Jun 29 20:18:37 UTC 2010


Hi

Are you referring to something like this:

http://www.electronicsweekly.com/Articles/2008/05/01/43680/fast-settling-syn
chronous-pwm-dac-filter-has-almost-no.htm

as a synchronous filter for the PWM? 

Bob

-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
Behalf Of Bruce Griffiths
Sent: Tuesday, June 29, 2010 4:07 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] yet another GPSDO design, or so

Attila Kinali wrote:
> On Tue, 29 Jun 2010 21:32:10 +1200
> Bruce Griffiths<bruce.griffiths at xtra.co.nz>  wrote:
>
>    
>> Its possible to build a 24 bit resolution D/A using a synchronously
>> filtered PWM circuit.
>> A pair of PWM outputs and a few relatively low precision resistors and
>> capacitors together with a low noise low drift reference are required.
>> The technique takes advantage of the fact that the required EFC voltage
>> changes slowly and isnt updated at a highg rate.
>> The synchronous filter technique eliminates the very long time constant
>> RC filters required with an asynchronously filtered PWM waveform.
>>      
> I've thought about that, but i'm afraid that this will add too
> much phase noise trough EFC noise. Though, i have not calculated
> how much noise this would generate.
>
> 			Attila Kinali
>    
How do you conclude that?
You don't know what the circuit is and you've never tested it.
Ulrich has, and the output noise is very low.

Bruce


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