[time-nuts] Fw: How to detect PLL lock

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Nov 6 22:12:15 UTC 2010


Surely its easier to measure the duty cycle of the 74AC86 by analog low 
pass filtering it and using an ADC to measure the output of the 
(buffered( analog low pass filter?

Bruce

Roberto Barrios wrote:
> Sorry, the links were obviously wrong:
>
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6554.jpg
> http://www.rbarrios.com/public/_MG_6556.jpg
> http://www.rbarrios.com/public/_MG_6565.jpg
> http://www.rbarrios.com/public/_MG_6567.jpg
>
> Regards,
> Roberto EB4EQA
>
> From: Roberto Barrios
> Sent: Saturday, November 06, 2010 10:48 PM
> To: time-nuts at febo.com
> Subject: How to detect PLL lock
>
> Hello,
>
> I’ve built a James Miller style GPSD with a Rockwell Jupiter, 74AC86 as phase detector and Isotemp OCXO. Division from 10Mhz to 10kHz is done with a 12F675 PIC that also outputs other frequencies and I also included a 16F88 that gives information as OCXO oven info and various GPS status indicators got from the NMEA string. Everything is built on a PCB similar to the Jupiter GPS. I built the PCB by plotting with a resistive pen directly on the copper with a plotter. It works reasonably well as compared to a Trimble thunderbolt, as per my limited knowledge. Some pictures of the result:
>
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
> http://www.rbarrios.com/public/_MG_6553.jpg
>
>
>
> I would also like to include PLL lock indication with a LED, but I’m struggling to find a reliable indicator. I’ve tried using the OCXO’s control voltage, which stabilizes when the PLL is locked as an indicator, monitoring it with an ADC of the PIC. Resolution is only around 14mV because of the voltage divider before the ADC input. I can’t make it react as desired to unlocks, I tried some formulas but it is always either too strict or too loose. I’ve also timed the duty cycle of the 74AC68phase detector output with a timer, but I guess the granurality (10Mhz/4) is too coarse to precisely detect when it’s constant. For either reason, the “PLL LOCK” led is lit when it shouldn’t or viceversa.
>
> Does anyone have a practical, “easily” implementable solution for the lock indicator in this vaguely-nut GPSDO, that this newbie could work out ? Ideally it would be implemented in software, but I understand this modest hardware may have severe limitations.
>
> Thank you,
> Roberto EB4EQA
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