[time-nuts] Fw: How to detect PLL lock

[Magnus Danielson]

On 11/07/2010 03:06 PM, Poul-Henning Kamp wrote:
>
> If you have a microcontroller, isn't it simpler to just look for
> convergence in the development of the error term ?

Possibly.

> You're probably not in any big hurry for exact convergence anyway,
> so overdampen the PLL and simply check that the redidual decreases
> towards zero.
>
> Once you have locked the PLL, the fastest way to detect loss of
> lock, in particular if you use too high time-constant, is the
> too low frequency of zero crossings in the residual.

There are many ways to observe phase-lock.

If you to level detect of the AC part of the beat signal, it will go 
from a fairly constant level to a very close to zero level. This takes 
no significant amount of hardware to detect, and there is several method 
to observe this "Loss Of Beat-tone". The motivation is that as long as 
the frequency error is large enough, the controlled oscillator will 
"slip", when the frequency comes within limits the PLL locks in rather 
than track in the remaining frequency error without a slip.

Thus, the slip detection could also use a form of slip time-out RC link.

Regardless of method (amplitude or beat frequency) the time-constant 
must be roughly matched to the lock-in frequency limit of the PLL.

Cheers,
Magnus