[time-nuts] Frequency multiplication

[jimlux]

On 2/4/11 1:18 PM, Magnus Danielson wrote:
> On 02/02/11 19:47, Hal Murray wrote:
>>
>>> Bottom line - there's a lot to look into, and they are unlikely to
>>> help you
>>> out.
>>
>> There are a lot of FPGAs used in DSP applications where the clock to the
>> front end ADC is critical. So I'd expect there would be some in-house
>> knowledge about this area. It may be that all the help you will get is
>> "Don't do that."
>
> You don't feed the ADC from the FPGA if you can avoid it.
>


especially if your ADC clock is a different frequency from the processor 
clock that's being used for most of the other logic on the FPGA.  I'd 
give a ballpark estimate of 20-30 dB isolation between the two on a 
Virtex 2.