[time-nuts] Advanced 5 to 10 MHz doubler

Paramithiotti, Luciano Paolo S luciano.paramithiotti at hp.com
Tue Feb 15 13:08:37 UTC 2011


  http://www.timeok.it/files/5_to10_mhz_advanced_doubler.pdf

>This design appears to have gone somewhat astray.
>high impedance unless of course the transistors enter saturation in which case the phase noise performance will be severely degraded.
>The best place for a balance adjustment circuit is actually in the emitter circuit.

*The collector balancing work correctly and is more simple to implement.

>The description of the biasing is misleading in that the actual bias level that sets the crossover current is determined by the signal dependent voltage >across the two 0.1uF capacitors in the emitter.
>With a 1:1 input transformer the quoted figure of 35 ohms for the input impedance seems excessive for large signal operation of the CB stages unless of >course they saturate.

*the input impedance is 35 Ohms @ 0dBm as measured with network vector analyzer. It can be upgraded to 50 ohms adding resistance on emitters, with some gain reduction and probably less phase noise. I will do some modification in the next future, including an input 6 Mhz low pass filter. As you know, the input signal have to be pure sinewave to avoid unsymmetrical positive and negative half wave and obvious unbalaced output and high harmonics contens. I will test also the common emitter configuration to better isolate the doubler from the input impedance and level variations. Regarding the input level I have setup it's range, as my personal standard,from +7 to +13 dBm.  

>It would also appear that the 20MHz tank 5.6uH + 12pF as drawn is inappropriate in that it inevitably leads to saturated operation.
>A series resonant 20MHz tank from the collector node to ground would be a better choice.

* The LC on collector is to adapt the impedance between the doubler and the filter and to cut the higher harmonics. The filter itself contain trap for 15 20 and 30 Mhz.  
 
>A snapshot or even a sketch of the collector voltage waveforms would be useful in showing that the transistors saturate or not.

*Actually the prototype is gone to friend's home and I cannot do any more measure on it. My next prototype's pubblication will be complete of collector voltage waveform to better understand the working condition of the doubler stage. I think the 2N3904 is not the best solution, i will test some more devices and bias point.


Thank you
Luciano

note: I'm not a genius, I just try to enjoy myself. If someone follow me, is at his own risk.

_______________________________________________
time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.


Luciano P. S. Paramithiotti




More information about the time-nuts mailing list