[time-nuts] Synchronisizing a 100MHz TCXO with Tbold, pse help

Attila Kinali attila at kinali.ch
Mon Sep 19 06:39:42 UTC 2011


On Mon, 19 Sep 2011 03:52:15 +0200
"Peter Krengel" <krengeldatec at gmx.de> wrote:

> I like to synchronisize a fine 100MHz TCXO with the
> 10MHz output of the Tbold. The TCXO has a EFC input.
> I know this can be done
> using a PLL but I do not want to add noise 
> to the very good noise parameters of the TCXO
> cause the 100MHz signal is to be used to clock 
> a FPGA which controlles fast cascaded ADCs.
> Has anybody a circuit diagram to use?

The circuit diagram depends on the PLL you use. And what PLL you use
depends on the frequencies, the loop bandwidth and the noise level
of the PLL output you want to accheive.

I'd do i the following way:

1) Get the book "Phase Locked Loops" by R.Best, read at least the
   introductory sections. Come back to this book later, when you've
   selected your PLL and read the relevant sections
2) Get an phase noise plot of your TCXO
3) Define how much oscillator noise at which frequencies your system
   can tollerate
4) Calculate to how much noise at the PLL output this translates
5) Go shopping for a PLL IC that fits your parameters
6) Enter your whole design into Spice and see whether it actally meets your
   requirements or not (be aware that you have to be carefull here, otherwise
   you get a very good random number generator)
7) Build your device
8) Measure it
9) Go back to 1 and refine your circuit.

Though, i must say that i don't see any obvious reason why an high sampling rate ADC should be synced to a Thunderbold. At least not when you have
this high noise requirements (a free running XO has the better noise figure
than a VCXO). On the other hand, your noise requirements cannot be that high,
otherwise you'd be using a high quality OCXO instead of a "cheap" TXCO. ;)

			Attila Kinali

-- 
Why does it take years to find the answers to
the questions one should have asked long ago?



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