[time-nuts] Synchronisizing a 100MHz TCXO with Tbold, pse help

ed breya eb at telight.com
Mon Sep 19 20:58:12 UTC 2011


If the 100 MHz VCTCXO is fundamentally "better" than the 10 MHz VC?XO 
in the Tbolt, then I would go with Chuck's idea to just use it with a 
divide by 10 in front, as the main oscillator. You will still have a 
good 10 MHz  signal available from the divider - just buffer it up 
and maybe harmonic filter it if necessary.

If the Tbolt uses an ovenized oscillator, I think you'd be better off 
keeping it as the main one. In this case, I'd recommend using a 10H 
ECL decade divider to get the 100 MHz down to 10, and compare it to 
the Tbolt 10 MHz with a 74HC4046A PLL IC (or higher performance type 
if necessary), driving the 100 MHz VCTCXO through a very long time 
constant loop filter. The reference sidebands will be pretty far +/- 
n*10 MHz out from your 100 MHz, and can be made very small since the 
filter is a brick wall, comparatively. You would have to optimize the 
close-in noise performance/loops depending on the relative quality of 
the two oscillators at various offsets.

Another option may be to use a 10H ECL D flip flop as a direct 
subsampler/phase detector, followed by a differential opamp loop 
filter, so a separate PLL IC would not be needed, but the loop filter 
would probably have to be faster to keep up with power supply noise 
and thermal effects in the D-FF.

Yet another way similar to that above, would be to use a classic 
harmonic mixer topology - with the 100 MHz reacting with the 10th 
harmonic of a good strong 10 MHz drive to a balanced RF mixer, giving 
a DC IF that represents phase, low pass filtered and amplified to 
control the oscillator.

Regardless of how the 100 MHz is "synchronized" to something else, 
you will have a PLL (or FLL) in some form - even manually 
recalibrating to a standard is a closed loop error correction system 
- it's just a question of the timeframes involved.

Ed




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