[time-nuts] FPGA GPSDO (Was: Re: NTP jitter with Linux)

[Azelio Boriani]

OK, taken a look: it seems that the smallest Spartan3 usable is the
400Kgates. I don't need the ZPU now but good to know.

On Sat, Apr 7, 2012 at 3:35 PM, cfo <xnews3 at luna.dyndns.dk> wrote:

> On Sat, 07 Apr 2012 13:19:14 +0200, Azelio Boriani wrote:
>
> > The Xilinx and Altera have their embedded CPUs (Microblaze and Nios) IP.
> > I'm not familiar with them and don't know how much they cost. Until now
> > I have developed on Xilinx 50Kgates FPGA and 128 cells CPLD with the
> > Xilinx's free tools.
> >
> Maybe ZPU
> http://opensource.zylin.com/zpuref.html
> http://opencores.org/project,zpu
>
> http://embdev.net/articles/
> ZPU:_Softcore_implementation_on_a_Spartan-3_FPGA
>
> /Cfo
>
>
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