[time-nuts] Power Supply Noise Affects Thunderbolt 1 PPS

lists at lazygranch.com lists at lazygranch.com
Mon Feb 27 10:46:56 UTC 2012


Those were bicmos designs where the LDO was to provide voltage for running controller chips. 

I've only done PMOS for stand alone LDO. 
-----Original Message-----
From: Steve <iteration69 at gmail.com>
Sender: time-nuts-bounces at febo.com
Date: Sun, 26 Feb 2012 23:54:20 
To: <time-nuts at febo.com>
Reply-To: Discussion of precise time and frequency measurement
	<time-nuts at febo.com>
Subject: Re: [time-nuts] Power Supply Noise Affects Thunderbolt 1 PPS


> 
> Having designed LDO chips, people expect them to perform miracles
> well beyond reality. If you have a PNP pass and you are sitting near
> dropout, you get control loops that are an ugly combination of a path
> to keep the PNP from getting saturated plus one to control the
> voltage.
> 
> I never really warmed up to
> PNP pass devices, but they are best for high voltage applications.
> 
> 

I was under the impression that the industry as a whole got away from
PNP pass back in the 80s. Off the top, I can't think of any PNP pass
regulation designs worth using.

You've got my curiosity when you mentioned high voltage. Seems to me
that PNP is even worse at high voltage, owing to the majority holes as
carriers rather than majority electrons as in NPN.

Why are PNP better for high voltage than NPN?  (I've been using PNP for
nearly everything for about 20 years) .. every now and then i get lazy
and grab a PNP, but that's beyond the context ;)

Steve

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