[time-nuts] DDS in GPSDO design?

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun May 27 22:23:35 UTC 2012


Michael Tharp wrote:
> Greetings,
>
> I've been pondering topologies for a custom GPSDO design and two 
> obvious choices seem to present themselves. The first, and seemingly 
> more popular by far, is to use a "pullable" oscillator as many OCXO 
> and Rb oscillators are and discipline it using a slow but precise DAC. 
> But unfortunately my Rb is not pullable so I would have to get another 
> oscillator. So I have a very stable but off-spec local oscillator, 
> which has to somehow be combined with the pulse-per-second from the 
> GPS. If there's a palatable analog way to do this, I'd love to hear, 
> because it would probably be simpler than the other idea.
>
> The second obvious idea is to use the local oscillator to clock a 
> frequency synthesizer (DDS). These can apparently tune a frequency 
> very finely and depending on how much one spends will produce a pretty 
> clean sine wave even at 10MHz. Since these also tend to require a FPGA 
> it also fits nicely with the nanosecond-level phase comparator I've 
> been toying with, and the whole mess (microcontroller, DDS, phase 
> comp) can all be clocked from some multiple of the LO without worrying 
> about unwanted phase correlation. Having the GPSDO be a black box that 
> can transform any undisciplined 10MHz reference into a disciplined one 
> is very appealing.
>
> Does anyone have any comments or experience with DDS-based frequency 
> references? Are they too jittery for this type of application? It will 
> certainly require quite a lot of creative filtering -- one page I read 
> mentioned the pitfalls of tempco of phase shift -- but that's just a 
> good excuse to brush up on my analog design.
>
> -- m. tharp
>
The principal problem with conventional DDS implementations is phase 
truncation spurs which can occur close to the desired carrier.
Virtually all commercial DDS chips produce such phase truncation spurs.

It is possible to eliminate such spurs if one implements a custom DDS 
using an FPGA and an external DAC.
In this case the performance is limited by the DAC.

Another approach is to use a cascaded mix and divide technique 
<http://www.karlquist.com/FCS95.pdf> to restrict the effective tuning 
range of the DDS.
The amplitude of DDS generated spurs is thereby significantly reduced.

Bruce



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