[time-nuts] GPSDO control loops and correcting quantization error

[Azelio Boriani]

Yes, you are right: but actually I have a 2.5nS simple time interval
counter in the FPGA and the only way to go beyond is the average. The
sophisticated way would be to implement a tapped delay line or vernier
delay line time-to-digital converter in a bigger FPGA than the XC3S50. And,
yes, I have recently started my first GPS disciplined Rb with the same
hardware. I have eliminated the fast and slow steps from the processing,
using only the slowest one.

On Fri, Sep 14, 2012 at 9:50 PM, Bruce Griffiths <bruce.griffiths at xtra.co.nz
> wrote:

> Azelio Boriani wrote:
>
>> Also you need a super ultra fantastic voltage reference for a 32bit DAC.
>>
>>
> Not really, the reference only needs to have low noise and good short term
> stability.
> Long term drift in the reference voltage will be corrected by the feedback
> loop.
>
>  Anyway, yes, in my GPSDO the controller has 3 levels: at startup is fast,
>> then slow and then very slow. The levels trigger when the precision
>> estimate is 10E-9 and 10E-11. If you have a resolution of 10nS then take
>> 10
>> averages and your resolution will be 1nS and so on.
>>
> However the noise associated with the timing resolution doesn't average
> down so quickly.
> If such noise is random than at best it is reduced by SQRT(10) by
> averaging 10 measurements.
> There is no real substitute for lower noise, higher resolution
> measurements.
>
>  When I switch level,
>> the number of averages is increased too but this leads to a slower DAC
>> update rate. This is the problem: now I'm trying to figure out if the
>> corrective action can be "predicted" (Kalman filtering) and applied at the
>> same speed.
>>
>>
> Bruce
>
>  On Fri, Sep 14, 2012 at 8:52 PM, Chris Albertson
>> <albertson.chris at gmail.com>wrote:
>>
>>
>>
>>> On Fri, Sep 14, 2012 at 11:21 AM, Michael Tharp
>>> <gxti at partiallystapled.com>  wrote:
>>>
>>>
>>>
>>>> Finally, do people think a 16 bit DAC is adequate or should I consider
>>>> building a 32-bit one? I looked at a few designs when putting this
>>>>
>>>>
>>> together
>>>
>>>
>>>> but decided to keep it simple until things were up and running.
>>>>
>>>>
>>> Having a 32-bit DAC would give you enough range so that you could drop
>>> in any OCXO you might have.  But if you can have trimmer resisters to
>>> selected for your specif OCXO then 16-bits should be enough.   If it
>>> were me, I'd want the DAC steps to be smaller than what the phase
>>> detector can measure.     Said another way a 32-bit DAC might
>>> eliminate the need for scale and offset trimmer resistors.
>>>
>>> Chris Albertson
>>> Redondo Beach, California
>>>
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>
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