[time-nuts] GPSDO with a RaspberryPi

Javier Serrano javier.serrano.pareja at gmail.com
Thu Feb 28 11:34:49 EST 2013

On Thu, Feb 28, 2013 at 1:26 AM, Azelio Boriani
<azelio.boriani at screen.it> wrote:
> First try at a simple GPSDO for the RaspberryPi. See here:
> http://www.c-c-i.com/exchange/    for the file PiAutoTIC1.zip

Nice project Azelio! Here are a few comments after a cursory look at the VHDL:

- Gated clocks (i.e. LSClock) are in general not a good idea. You can
split things in two: the serial link clocked by SClockIN and the
getting hold of the value of the counter in a separate process clocked
by PPSReference (or for a better option, see below).

- In any case you will have to deal with metastability properly [1].
Now you're clocking the 24-bit output of the counter (which is in the
Clk10MHz clock domain) with the PPSReference signal (after gates). It
would be better to synchronize the PPSReference input to Clk10MHz with
three FFs and a synchronous edge detector (i.e. PPSRising <= PPSRefd2
and not PPSRefd3 inside a CLK10MHz clocked process). Then you can look
at the value of the counter when that 1-tick-wide Clk10MHz-synchronous
signal (PPSRising) goes to '1'.

- The CMDReg process is another place where metastability can occur in
the current design.

- Once you have reduced the number of clocks in your design you will
need to watch carefully every place where clock domains are crossed
and put synchronizers [1] in there.



[1] I uploaded some useful references to http://www.ohwr.org/documents/22

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