[time-nuts] Cheap 9.8Mhz Sa.22c's

Magnus Danielson magnus at rubidium.dyndns.org
Sun Jun 2 16:42:15 EDT 2013


On 06/02/2013 10:14 PM, Bob Camp wrote:
> Hi
>
> On Jun 2, 2013, at 4:10 PM, Magnus Danielson<magnus at rubidium.dyndns.org>  wrote:
>
>> On 06/02/2013 10:05 PM, Bob Camp wrote:
>>> Hi
>>>
>>> 9.3804 MHz = (2^15*3) * 100 Hz
>>>
>>> 10 MHz = 2^5 * 5^5 * 100 Hz
>>>
>>> With a normal integer PLL, your highest lock frequency would be 2^5* 100 Hz = 3200 Hz.
>>
>> Doable, but you better care about details, and going for a PI-loop is the way to go. For lower ratios between locked frequency and comparator frequency you can cheat more if you do not have any particular requirements.
>
> I'd put it in the "just because you can do it, doesn't mean you should do it" category. The 3,200 Hz sidebands on the 10 MHz could be an issue in some applications.

Oh, I agree fully. There is however applications where the benefit of 
doing it outweighs the option of not do anything. If you have a less 
than optimal resynthesis but with a much stabler signal than what is 
running today, then it is clear that it's an improvement.

If you have real phase noise issues, then you need to care more about 
detail, and just nicking a rubidium of the ebay and hack a resynthesis 
to compensate for it's frequency seems dodgy and not very economic. We 
need to put it in context here.

Also, a good continuous (rather than dead-band) phase detector is 
assumed, and the PI loop will help the oscillator to keep steady, where 
as a lossy loop or a dead-band detector would cause severe side-bands. 
Considering that a PI-loop is an op-amp, two resistors and a cap it 
seems stupid not to use it. Any for the modern 4046 variants (7046 and 
9046) may be something to look at, but a S/R flip-flop should be ideal.

Cheers,
Magnus


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