[time-nuts] Clock Driver Design

[John C. Westmoreland, P.E.]

Hal,

> SN74LVC1G125  - Single Bus Buffer Gate with 3-State Output

TI does all of their testing: f = 10MHz for the chip - that is in the
datasheet.

If you drive it too hard, expect it to drive too much capacitance, etc -
yeah - the voltage waveform will suffer.
But, using it within the spec - I think it is just fine.

Sounds like Tom is going a different route on this anyway - the parts he's
pointed out should be fine I think - my concern is the video amp at present
- if
it's for broadband it may not work.  If it's for base-band NTSC/PAL it may
not work.

Regards,
John




On Fri, Sep 27, 2013 at 1:04 AM, Hal Murray <hmurray at megapathdsl.net> wrote:

> > SN74LVC1G125  - Single Bus Buffer Gate with 3-State Output