[time-nuts] Unified VCXO Carrier Board

[Bruce Griffiths]

On Sunday, October 25, 2015 09:21:02 AM Charles Steinmetz wrote:
> I wrote:
> >>According to the simulation, the resistor has no effect on the output
> >>amplitude until it is well below 1k ohms
> 
> Bruce replied:
> >even 10k increases the output signal amplitude by 130mV or 2.6%.
> >However that is smaller than the tilt/sag in the high level output due to
> >feedthrough via Cbe of the input transistor when it is off.
> 
> Bruce is correct, although I don't consider 130mV to be a significant
> effect on a 5v logic level.  My fault, I guess, for saying "no"
> effect instead of "no significant" or "no material" effect.
> 
> But, do we really need to dispute every insignificant, niggling
> little detail like this?  Even in science, there must be *some*
> allowance for the use of everyday language instead of requiring
> absolute explicit clarification of every possible point, or all
> communications would be unbearably tedious from all of the
> qualifications.  I say this as someone who is often criticized for
> overclarifying to the point of being pedantic and tedious.
> 
> There was simply no need, nor excuse, for the prior (incorrect)
> suggestion that a resistor to ground from Point "A" would not be
> effective in canceling the small asymmetry of the circuit, OR for the
> suggestion that such a resistor would be a useful means to adjust the
> output amplitude (this because of (i) the concomitant ill effect on
> symmetry and (ii) the much more direct and efficacious means of
> achieving the result by adjusting R6 or R1 and R2).
> 
> Best regards,
> 
> Charles
> 
> 
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Charles

There was no such suggestion, merely  a note that the amplitude was also 
affected by this. This effect is important in that its probably advisable to 
ensure that the input protection diodes of any gate being driven by the 
output don't enter into conduction (I discovered that at least for the 
74HC04 that the propagation delay jitter increased dramatically once the 
input protection diodes began to conduct). Thus an increase in output 
amplitude by a few hundred mV could be detrimental to the performance 
of the driven logic device.

Whilst the symmetry adjustment effect is real its actually achieved by 
adjusting the ratio of the emitter currents of the 2 transistors (its not a 
threshold effect due to Vbe changes -they are too small but an adjustment 
of the differential switching delays of the 2 transistors).
Consequently adjusting the ratio of emitter currents of Q1 and Q2 is best 
made via a pot (200 ohm??) connected between the upper ends of R1 and 
R2 (reduce R1 and R2 to 910 ohm) with its wiper connected to the C5, C6, 
C7, R7 node.
Adjusting the wiper position has very little effect (tens of mV) on the 
output amplitude whilst allowing adequate range of adjustment of the 
output signal duty cycle.

Adjusting the value of R6 can be counter productive in that it spoils the 
match to a 50 ohm load achieved via simple 2:1 (turns ratio) stepdown RF 
transformer for the purposes of measuring the PN of the circuit.

Bruce