[time-nuts] 4046 experiment for gpsdo

Sat Sep 26 23:33:41 EDT 2015

Hello All,

Of course I could not wait for tomorrow, so built and tested the phase
comparator that I mentioned in my previous email. (with a change)

I hooked up the output (labeled 4 and 5) to my scope, and introduced a very
small phase difference between clocks,
and I get tiny tiny pulses from 4 and 5 depending on whichever is lagging.
So it works. There is a little DC bias on the flip flop outputs, but I
guess the signal diode will take care of it.

So here is my plan, in summary: hookup GPS 1PPS output to one input, and
1PPS output from my RTC to other.
The changes in phase introduce tiny pulses from outputs of flip-flops 4 or
5 whether depending on whichever one is leading.

I get those pulses, and feed it into 2 seperate RC networks, (like
described at the 1ns GPSDO email) - But instead of one I will have two
networks, and 2 adc's sampling, one for lagging other for trailing pulses,
which then I will be able to adjust the speed of my XTAL or RTC.

Currently I am using 74LS versions of the chips, since thats what I had in
my junkbox, but monday I will buy 74HC or 74HCT versions. I would love to
hear about your ideas on which family to use, for this application.

Once I am done constructing a proper circuit, and finish the project I
decided to open source the code on github. (It is written in energia, but
it will be fully compatible with arduino, it might need some changes for
interrupts since on arduino you can not use any pin for interrupt like in
texas instruments launchpads)

I am also very curious about what people use in metrology labs for time
comparison? If we were chasing pico or femto seconds syncing, how would we
compare phases?

Best regards, and thank you very much for your input.

-Can Altineller

On Sun, Sep 27, 2015 at 4:30 AM, Can Altineller <altineller at gmail.com>
wrote:

> Hello All,
>
> Thank you for all the answers. I have been experimenting relentlessly with
> phase detectors, and finally I came up with a circuit that will isolate
> lagging and forward pulses.
>
>
> 
> So, if signal is lagging the compare, it will send one pulse from the
> output of the first flip flop. If the reverse, it will send pulse from the
> output of second ff.
>
> I have also built the PC2 of 4046 with nand gates, it does encode
> direction of phase difference, but I have not particularly found it useful.
> The circuit above works in simulation, but I am to test it tomorrow in my
> workshop.
>
> It turns out the heart of this operation is the phase comparator, and
> there are many phase-frequency comparators. I am expecting the circuit
> above work with picosecond precision.
>
> There are also many chips that does phase-frequency comparison. Maybe one
> would be suitable for this better?
>
> Best Regards,
> C.A.
>
>
> On Sun, Sep 27, 2015 at 1:12 AM, Magnus Danielson <magnus at rubidium.se>
> wrote:
>
>> Hi Hal,
>>
>> On 09/26/2015 11:47 PM, Hal Murray wrote:
>>
>>>
>>> magnus at rubidium.dyndns.org said:
>>>
>>>> Another method would be to measure the phase-detector beat-note
>>>> frequency
>>>> (most have mixer-like behavior), which you should be able to  measure
>>>> with
>>>> quite good precision, then set the EFC accordingly and then  close the
>>>> loop.
>>>>
>>>
>>> How do you get the sign out of a beat note?
>>>
>>
>> You don't directly. You need to augment it, and there is several ways of
>> doing that.
>>
>> For instance, you can use the PFD detector of the 4046 to know if you are
>> above or below in frequency. The normal low-pass filter on the output of
>> the charge-pump should do it.
>>
>> Another method is directly on the beat-note. You simply try either
>> direction. The beat-note will either be twice the rate or be very low
>> frequency. Since you already established the rate, if you haven't seen it
>> for the period of the rate you had (if it doubles, it will be at least once
>> in that period) then you guessed right, otherwise you guessed wrong and
>> just need to flip the sign and re-verify. To make sure you can even let the
>> verification period be multiple cycles of the detected beat-note rate.
>>
>> The beat-note method does not work very well or quickly if you have a
>> steered source which has a very narrow range to begin with, say a rubidium.
>> In that case looking at the beat-note is just a monitoring solution to know
>> when to start attempting lock.
>>
>> There is so many ways to do this. I just wanted to illustrate another
>> method, and that relatively simple approaches, some minor logic applied to
>> a CPU and a handful lines of code can create a relatively robust design.
>>
>> Remember, in the end you want a good phase-detector with a PI-loop, at
>> least. How you get it to lock up smoothly and relatively robustly there is
>> myriad of tricks to use. The beat-note approach may suffice for some
>> hobbyist work while being relative simple to understand.
>>
>> The beat-note of the unlocked phase-detector is also how phase-detector
>> lock is often detected in analog designs, at least those that I've seen.
>> Essentially they detect the lack of AC signal in the phase-detector
>> response, which is due to the cycle-slip. Each cycle-slip is a beat-note
>> event. The rate of it is the difference in frequency, and as it is
>> relatively low frequency, using some 48 MHz counter to count the period
>> time provides a good precision. A rubidium with say maximum of 1E-9 error,
>> even the quickest beat-note would be 100 s, so it is clearly not a useful
>> solution for quick-lock.
>>
>> Cheers,
>> Magnus
>>
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>
>
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