[time-nuts] Shera revisted

Bob Camp kb8tq at n1k.org
Fri Aug 12 11:30:41 EDT 2016


Hi

It might be easier to get into this if we put numbers on some of this. Are 
we after a 16X increase from 10 ps (10 ps -> 0.6 fs) or from 10 ns (10 ns -> 600 ps). 

There’s a lot of range there :)

Testing things like temperature dependance and noise / spurs can be challenging in
some of these approaches. It is not at all uncommon to see one person look at a system
and come up with a 50 ps number. Somebody else looks at it and comes up with 1 ns. 
Who’s right? It depends a lot on the definition of what is being tested. 

Bob


> On Aug 12, 2016, at 7:56 AM, Paul Boven <p.boven at xs4all.nl> wrote:
> 
> Hi everyone,
> 
> On 2016-08-11 21:06:12, Attila Kinali wrote:
>> Hoi Bert,
> 
>> I'm asking, because if you go the way of using a CPLD anyways, you could
>> throw in another $2 for an opamp to build a time-to-amplitude converter
>> (à la PICTIC II) and boost the resolutiong from 40ns to <100ps.
>> As you would be measuring the PPS relative to the local clock, you
>> would need only one "leg" of the PICTIC II (ie just one TAC plus a single ADC).
> 
> I'd want to use the programmable logic to build a (mostly) digital interpolation, either something along the lines of the 5370, or digital interpolation of the clock using DCM's like I did on a Spartan-3 years ago. On that device, I could achieve a 16-fold resolution increase by use of the clock management devices.
> 
> I'm currently trying to replicate my old digital clock interpolation setup on the Xilinx/Digilent Arty board, with the aim of locking a Rb to GPS.
> Another goal is to get a DDMTD going on the Arty board for clock comparisons.
> 
> Regards, Paul Boven.
> 
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