[time-nuts] High rate, high precision/accuracy time interval counter methods

[Magnus Danielson]

Rick,

Unless you uses the high-speed SERDES blocks, the jitter and systematic 
noises inside FGPAs can be pretty prohibitive.

Enrico Rubiola and his team have made some of the best characterizations 
of FPGAs I've seen, but I know from several other experinces that timing 
can uhm shift around.

I proposed some 10 years ago to use the 10 Gb/s SERDES for 100 ps 
resolution counter, the chip that could support it then could do 8 
channels. It had some fancy tweaking so you could fine-tune the sampling 
point to align channels up. Would still be a fun project to do.

The normal logic path isn't "as fun".

I'd say that the precision timing stuff should be done in a separate 
front-end, but the sea of logic to handle all the dataflows can be done 
in a FPGA.

Cheers,
Magnus

On 05/03/2016 05:40 PM, Richard (Rick) Karlquist wrote:
> HP/Agilent/Keysight laser interferometers
> measure at the kind of rates you are talking
> about and (last time I heard) could divide
> an interference fringe down to 1/512 of a
> wavelength.  As you say, they definitely use
> an ASIC with a ring oscillator.  Perhaps
> there is some way you could repurpose the
> interferometer electronics to make your
> measurement.
>
> You also might consider that over 25 years
> ago, HP developed the 5313X counters with
> interpolators implemented in FPGA's.  The
> FPGA's available now are vastly more
> sophisticated and much faster.  Perhaps there
> is a way you do your ASIC in an FPGA.
>
> If you really do need an ASIC, the best way
> to get that done is to partner with a university
> and have some PhD student design it.  Universities
> often have arrangements to do this.
>
> Rick
>
> On 5/3/2016 5:31 AM, Attila Kinali wrote:
>> Hi,
>>
>> We had here a discussion about measuring events (ie time stamping
>> them precisely) with high rates. As some of you know, Javier and
>> his group, Bruce and me are working on a system that should give
>> us something better than 10ps (my guess is that we should get close
>> to 1ps) at a rate of (guestimated) 1MHz per channel. (Based on the
>> excitation of a LC tank and measuring the ring-down/phase with an ADC).
>>
>> As it is with researches, we want the moon, and prossible even more.
>> So we were talking about getting the measurement rate up even higher,
>> to 10MHz and if possible 50MHz with the same precision. The above
>> approche will not work above 1MHz. Using different filters it might
>> be possible to get it up to maybe 10MHz, but it would be an awkward
>> design at best.
>>
>> The only methods I am aware of (and could find) that achieve such high
>> rates are those, based on (vernier) delay lines (and their equivalent
>> ring oscillator ones) in ASICs. But this means that a costly ASIC needs
>> to be produced.
>>
>> Does someone know of other methods that could achieve high measurements
>> rates with better than 10ps precision/accuracy? (This question is mostly
>> a hypothetical question out of interest, I don't plan to build
>> one...yet :-)
>>
>>             Attila Kinali
>>
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