[time-nuts] PLL performance?

[paul swed]

Hello to the group quite late to the discussion. Pretty interesting.
But I assume the drive for the pendulum is some impulse. Not the old
mechanical clock with a spring for power.
Regards
Paul
WB8TSL

On Wed, Mar 22, 2017 at 7:48 PM, David Scott Coburn <scotttt at optonline.net>
wrote:

> I will not be using an off-the-shelf optical interrupter  type sensor for
> this.
>
> I have designed a custom IR LED -> IR photodiode unit which will have a
> flag that blocks half of the IR signal when the pendulum is stopped, and
> the motion of the pendulum will modulate this 50% signal from about 25% to
> 75%.  The output will be an analog 'sine' wave.  This sine wave goes into
> some custom analog electronics which separates the DC and AC parts of the
> signal, does some amplification, and then into a precision zero-crossing
> detector (ZCD) circuit.  I have assembled these circuits and have been
> testing them at zero DC (ie, no DC offset or sine input).  The next step is
> to connect the LED/photodiode circuit and characterize the circuit with
> just the DC signal (as it would be if the pendulum was not moving).  This
> stage of the testing is looking for noise and long-term stability issues.
> I have not yet injected a reference sine signal to characterize the
> circuit's AC performance.  On my todo list!  :)
>
> I hoped to characterize the jitter of the ZCD circuit with a good
> low-jitter reference AC signal as an input, but it is not trivial to
> generate such a signal!  (Short of spending lots of $$$ on a *good* signal
> generator.)  I have an HP3325A which I intend to use for this but the 0.5
> Hz output has quite a lot of jitter (not unexpected considering the way it
> is generated).  But, I guess this is not so much of an issue, since I just
> need to see if the ZCD circuit makes the jitter worse.
>
> The PLL circuit will not be used to characterize the performance of the
> pendulum, it will just be used to drive the display.  The output of the ZCD
> circuit will be fed directly into a 'time-stamp counter' circuit to monitor
> the pendulum performance.  To some degree it will be good to have a nice
> low-jitter signal from the pendulum, but I am more interested in the
> longer-term performance , where the jitter (hopefully!) is all averaged out.
>
> (The DC part of the signal will be monitored for changes in the LED output
> (to monitor its stability) and there is a precision rectifier circuit to
> monitor the amplitude of the AC part of the signal (which is proportional
> to the amplitude of the pendulum motion).  And, there is a precision
> voltage reference for driving all of these circuits.)
>
> Cheers,
>
> Scott
>
> (Maybe this answer was more than you bargained for!)
>
> On Wednesday, March 22, 2017 12:19:09 PM EDT Scott Stobbe wrote:
> > Neat Project. I don't know if it will come up for you but optical or hall
> > rotary encoders are notorious for jitter. While a generic IC comparator
> may
> > have an open loop-gain of 100 dB, creating the mechanical equivalent is
> not
> > so easy. Hall/optical have a softer switch on/off curve. Depending what
> you
> > choose to instrument your pendulum may also introduce more jitter. The
> > 20logN dosen't help either, 1 millideg at 0.5 Hz is 5.5 cycles at 1 MHz.
> >
> > On Mon, Mar 20, 2017 at 9:07 PM, David Scott Coburn <
> scotttt at optonline.net>
> >
> > wrote:
> > > Hi All,
> > >
> > > I have built and tested a PLL circuit that will be used to generate a 1
> > > MHz signal locked to a 0.5 HZ signal from a pendulum.  (Details
> available
> > > upon request.)
>
> <snip>
>
> > > Cheers,
> > >
> > > Scott
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