[time-nuts] Performance verification for time counters

Hal Murray hmurray at megapathdsl.net
Thu Nov 30 02:04:02 EST 2017


kb8tq at n1k.org said:
> The gotcha with a DDS in this case are the sawtooth spurs. To get them down
> to the 5 ps level, you would need a DDS with a clock that is well into the
> 100’s of GHz. 

I think that assumes you want to be able to generate an arbitrary frequency.

Suppose I start with 10 MHz.  It's easy to get a clean 1 MHz or 5 MHz, but 
not so easy to get 3 MHz.  But if I start with 9 MHz, I can get a clean 3 MHz.

How do I figure out how many crystals I need?

How good are PLLs relative to 5 ps?  Can I use them to make pseduo-crystals?

What's the term for PLLs where I divide the output by M and the reference by 
N?  As M and N get bigger I get more possible output frequencies but the 
output of the phase comparator gets lower in frequency and hence harder to 
filter.  How low can I go before 5 ps gets interesting?  (Is that a 
reasonable question?)

If I have an array of crystals and PLLs, I can get some more flexibility if 
the crystals are VXOs.



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