[time-nuts] Understanding Oliver Collins Paper "Design of Low Jitter Hard Limiters"
hmurray at megapathdsl.net
Thu Aug 23 02:00:10 UTC 2012
jmulchin at cox.net said:
> The amount of jitter verses logic family is all over the place as well. Take
> a look at an LS verses an HCT vs an S family and you will see what I mean.
> Some of them are very nasty, and are not all created equally.
Is there any collection of hard data? How much does it depend upon
manufacturer or test setup? How much couples through from power supply?
Does the jitter scale with prop-time?
These are my opinions. I hate spam.
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