[time-nuts] First success with very simple, very low cost GPSDO
csteinmetz at yandex.com
Fri Apr 11 01:47:45 UTC 2014
> > Why even try to discipline an OCXO before it's warm? Just leave the
> > control loop off for a predetermined time at startup.
>Even if you wait long enough you still need to set the DAC to "something"
>as a first try. What if your first guess is off by a large amount.
> > Alternatively, you could figure out the EFC voltage needed to zero the
> > cold oscillator
>How to do that? Can you write code to do this without counting overflows?
>You can be off by 256 cycles and never know it. Let's assume someone is
>building a GPSDO because they need a frequency reference and don't have
>one. A good assumption, I think. How could such a person "figure out the
>EFC voltage needed" with out either coining cycles?
You originally described a system that counts to 5M every
second. Tom and others pointed out that you do not need the complete
5M count, all you need is the remainder of a modulo count. The
question then is, how much of a remainder do you need to be sure that
it spans all anticipated errors in both the PPS and the
oscillator? Tom opined that 8 bits should be sufficient, based on
some realistic assumptions regarding the anticipated errors in PPS
placement and oscillator drift. (Note that a 256 cycles per second
error is 51 PPM at 5 MHz.) Brent said that he found 8 bits was not
sufficient to track his OCXO from cold, so he went to 16 bits. I
questioned whether trying to track the OCXO from cold was a
So: If you can't count on anything, then you need to count every
cycle. (But wait -- if you can't count on anything, you can't count
on your PPS being accurate, either.) In the real world, you should
be able to trust that any oscillator that is chosen for a GPSDO will
free-run within 1 PPM when it is warmed up, and that your PPS will
always be within 1 PPM, as well. This determines how large your
remainder needs to be. I agree with Tom that 8 bits should be plenty
(with the caveat pointed out by Brent, that 8 bits may not be enough
to track the OCXO from cold). So, my suggestion was to wait until
you CAN trust that the oscillator error is within your error budget
before starting to discipline.
As far as where to start the DAC, I'd be inclined to determine what
EFC voltage puts the warmed-up oscillator within 1 PPM and store the
corresponding DAC word for readout at boot time. (I'm assuming here
that any aspiring time nut has or can beg a counter good to 1PPM
before building the GPSDO. If not, see below.) To account for
long-term oscillator drift, you can update the DAC word in NV memory
with the long-term average during locked operation.
As far as disciplining the oscillator from cold (which I do not
recommend for the reasons I discussed previously), you could do the
same thing, either manually at construction/alignment time, or by
counting the full 5M immediately at startup and zeroing the
oscillator with a fast loop. (This would also apply to the warmed-up
DAC count referred to in the paragraph next above, if you do not have
independent means to ascertain when the OCXO is on frequency. In
either case, you could make the "count every cycle" mode a
manually-invoked calibration subroutine and use the more efficient
and robust modulo count for normal operation.)
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