[time-nuts] 74HCT9046A Max. Operating Frequency

[sg sg]

Hi,

I'm about to implement a PLL for a 24.576 MHz VCXO using the phase-frequency detector (PC2) of the NXP 74HCT9046A. From the datasheet (www.nxp.com/documents/data_sheet/74HCT9046A.pdf) it is not clear to me what the maximum operating frequency for this phase detector is--from the enable and disable times (page 20 and figure 19) I presume 24.576 MHz is too much.

So I probably need to add dividers at the inputs. Can someone advise me on the choice of division ratio?

Thanks for your time,
Samuel