[time-nuts] LTE-Lite module
kb8tq at n1k.org
Sun Oct 19 15:59:25 UTC 2014
The phase comparison part of the PLL is pretty straightforward if you are looking at two RF frequencies. An XOR gate is one solution, there are many others. Getting something like 100 to 200 ns full scale on the phase comparator makes the rest of the gizmo much easier. A 12 bit ADC on a MCU will get you to 100’s of ps per bit., That is more resolution (it’s < 1 ns) than you need for this. Controlling the OCXO is either an outboard ADC ($2 or so) or a PWM (free with the MCU). There will be a few regulators, resistors, caps, and maybe a pot or two involved as well.
Total parts cost on the digital loop done with an appropriate MCU is probably less than $10. Custom code wise, it’s a few hundred lines of C on a 32 bit ARM. Pre built (wizard driven) device init stuff will be way more than that, but you don’t write any of that. Since it’s just a PLL and not a full GPSDO, there’s not a whole lot to it. If building up the MCU board is the issue, there are *many* eval boards out there for < $15 that will do the trick.
Debug, optimization and tweaking are where the major effort is (like 80 to 90%). That will take at least few months of work and require some test gear. Any time you plug in a significantly different oscillator, you will have to put in this part of the effort. Getting the long run ADEV data, making sure it’s right, and then analyzing the result is something there is no magic shortcut around. If you are set up for it (you are a TIme Nut right?) , there’s no cost other than your time. If it’s a hobby - your time is free (or is it …).
No it’s not a “plug in a pre-made gizmo and forget about it” sort of thing. There is real work, lots of time, mental effort, working gear, and patience involved. You *will* get it wrong more often than you get it right as you go through the process. Stuff happens, runs crash, gear fails, it’s the real world. That’s the learning part of the project. If its a hobby that’s what you are doing this for.
> On Oct 19, 2014, at 10:39 AM, Charles Steinmetz <csteinmetz at yandex.com> wrote:
> Poul-Henning wrote:
>> >zeroes). That would need to be done by changing the PLL parameters
>> >internal to the LTE-Lite, which are inaccessible. Without such
>> >reprogramming, the LTE-Light can never get the best out of an OCXO.
>> It certainly can and it's not even hard:
>> Configure the LTE to emit a suitable frequency relative to the
>> OCXO and use an analog PLL to steer the OCXO's EFC.
> Any worthwhile OCXO will need a loop with a time constant on the order of hundreds of seconds (a corner frequency on the order of uHz) to get the most out of it as a GPSDO. As has been discussed on the list many times, there is simply no practicable way to design an analog loop with such a long time constant. So the person designing the PLL must be able to design and build an all-digital PLL, or settle for a loop that crosses over to the GPS several decades too early (which is certainly not getting the most out of the OCXO).
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