[time-nuts] Using CPLD/FPGA or similar for frequency
alan.ambrose at anagram.net
Thu Jun 11 14:22:58 UTC 2015
So that turns into 2 games:
How fast can you count?
How many digits can you get in 1 second?
A clever interpolator for frequency or TIC would kill it - for TIC essentially a PICTIC on steroids. The PICTIC does 19pS with a 10 bit ADC and a 66MHz clock, an SR620 does 4pS with a 12 bit ADC and an 80 MHz clock - so ... cough ... Spartan 3E at 256MHz with 16 bit ADC - and 1pS should be easy
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