[time-nuts] NTGS50AA 1 PPS mod

[EB4APL]

I uploaded the partial schematic and some other info to:
https://www.dropbox.com/s/k23e3x00ypnlx67/NTGS50AA%20info.zip?dl=0
You don't need to have a dropbox account to download it, just follow the 
link.

Regards,
Ignacio




El 17/06/2015 a las 3:20, EB4APL wrote:
> Hi,
>
> I has been making some tests with the 1 PPS output and here are the 
> results:
>
> Lady Heather cable delay commands works with both polarities, i.e. it 
> can advance or retard both 1/2 and 1 PPS signals, I used as reference 
> and external 1 PPS signal from a Rb oscillator.
> The first impression is that the 1 PPS  edge leads the 1/2 PPS about 
> 550 ns and this difference is consistent after some cable delay 
> commands and antenna disconnections, it is maintained during holdover.
> Then I tried several power cycling and warm resets and this make an 
> annoying thing to appear: during the acquisition and phase locking the 
> difference jumped between 540 and 140 ns in 100 ns steps.  This is due 
> to the 1/2 PPS synchronization with the SYS_CLOCK signal, so when the 
> internal 1/2 PPS moved back and forth until the system phase lock is 
> obtained, the output jumps between successive cycles of the 
> SYS_CLOCK.  The annoying thing is that its final state is not always 
> the same, the final difference can be any of the mentioned steps, from 
> 120ns to 550 ns and there is not guarantee which one is obtained while 
> in my board the 540 ns difference is the most common.  I don't know 
> yet  it the 1 PPS is closer to the "epoch second" or it is the 1/2 
> PPS, I have to hook up a GPS timing module and an antenna splitter and 
> see what happens. Anyway since Nortel specifies a tolerance of +/- 1 
> us of the 1/2 PPS with respect to GPS even second, any of the seen 
> values are within specs but it is not very convenient for Time Nuts.
>
> Regards,
> Ignacio
>
> El 14/06/2015 a las 20:35, EB4APL wrote:
>> Even if I get a cell site I would not use it for a "private network", 
>> here all cell phones are GSM not CDMA.
>> The only use for the 9.8304 MHz is as a master for deriving serial 
>> comm clocks (i.e. 9600 is  9.8304 / 1024) but I don't plan to became 
>> a "Serial Comm Time Nut" yet. ;-)
>>
>> Ignacio
>>
>>
>> El 14/06/2015 a las 1:48, Bob Camp escribió:
>>> Hi
>>>
>>> Of course tomorrow you will stumble into a “great deal” on a 
>>> complete cell site that needs a 9.8304 MHz clock :)
>>>
>>> ====
>>>
>>> One thing to watch:
>>>
>>> The pps you now have may or may not be deterministic in its relation 
>>> to the every other second output. It also may or
>>> may not be in a fixed relation to GPS. I would bet money that it 
>>> *is* in a fixed relation and that it’s actually better than
>>> the other signal. Just because I believe it to be true does not make 
>>> it true. It needs to be checked against something else.
>>>
>>> Bob
>>>
>>>
>>>> On Jun 13, 2015, at 1:56 PM, EB4APL <eb4apl at gmail.com> wrote:
>>>>
>>>> Hi,
>>>>
>>>> I just finish the mod.  It was easy, I cut the trace between TP14 
>>>> and U405-6 and soldered a wire between TP14 and TP33. Now I have a 
>>>> pretty 1 PPS on J5, the old 9.8304 MHz output. The signal has 0-5 V 
>>>> levels, normally high with a 10 us pulse going down.  In my unit 
>>>> this pulse leads the even second pulse by 539 ns.  I will check if 
>>>> the Lady Heather command for compensating the cable length can be 
>>>> used to move this if somebody needs a more accurate "epoch second". 
>>>> I have to use the 1PPS from my FE5680A as a reference but now it is 
>>>> disconnected.
>>>> I have made a picture of the mod and I'll include it with my 
>>>> partial schematic (I made some advances there) and the list of the 
>>>> TP signals that I'm preparing for upload.
>>>> I have checked that now I have also 4 additional 1 PPS outputs in 
>>>> the 110 pin connector J2.  They are in the pins previously used by 
>>>> the SYS_CLK signal.  They are differential LVDS as most of the 
>>>> signals on this interface.
>>>>
>>>> Regards,
>>>> Ignacio
>>>>
>>>>
>>>> El 13/06/2015 a las 1:14, Ed Armstrong escribió:
>>>>> Ignacio, I would very much appreciate a copy of whatever 
>>>>> schematics you have, even if it is not guaranteed to be 100% accurate
>>>>>
>>>>> I agree with you that the 9.9804 Mhz is basically useless, while 
>>>>> the even second pulse is merely almost useless. However, as you 
>>>>> have apparently looked the board over more carefully than me, you 
>>>>> probably already understand why I did it the way I did. The 
>>>>> location of the two output circuits were very easy to find, the 
>>>>> path from the connector to them is quite distinctive. I just 
>>>>> needed to find out where the signal got into the output circuit 
>>>>> from, and when I flipped the board over, the trace bringing in the 
>>>>> even second pulse was extremely obvious. There was no obvious 
>>>>> trace for the 9.9804, and I didn't feel like probing all over the 
>>>>> place and looking up a lot of chip numbers to try to figure out 
>>>>> where it came from, as I have a very unsteady hand which makes 
>>>>> poking around in these closely spaced components an invitation to 
>>>>> disaster. So I just went with the obvious.
>>>>>
>>>>> I found it interesting that the output circuit inverts the signal 
>>>>> a few times. I actually would have preferred to invert it, so that 
>>>>> the polarity was correct for a raspberry pie or a serial port 
>>>>> under Windows, but it appeared some of the traces to do so were 
>>>>> hidden in the layers of the board, and again the more I fool 
>>>>> around the better my chance of shorting something out and becoming 
>>>>> very unhappy.
>>>>>
>>>>> I will be anxious to hear how your version of the modification 
>>>>> works out, please do keep us posted.
>>>>>
>>>>> I believe the antenna cable feed delay is going to work in the 
>>>>> wrong direction here, I also seem to recall reading somewhere that 
>>>>> the adjustment range may be limited. I did pretty much correct the 
>>>>> offset by manually setting my position about 75M higher than what 
>>>>> the device figured it to be, but I am concerned that would only be 
>>>>> accurate for a satellite directly overhead, and may cause other 
>>>>> inaccuracies by throwing off the geometry, especially for 
>>>>> satellites close to the horizon. Based on what I am currently 
>>>>> seeing from the Pi, I think the smart solution is to just ignore 
>>>>> the offset altogether.
>>>>>
>>>>>
>>>>> Ed
>>>>>
>>>>> On 6/10/2015 11:30 AM, EB4APL wrote:
>>>>>> Hi Ed,
>>>>>>
>>>>>> I am the one who discovered the 1PPS pulse while troubleshooting 
>>>>>> a NTG550AA.  Instead of reuse the 1/2 PPS output and missing this 
>>>>>> signal, my plan is to recycle the 9.8304 MHz output circuitry and 
>>>>>> connector, the circuits are almost identical.  So I will cut the 
>>>>>> trace that goes from TP14 to U405 pin 6 and also use a wire 
>>>>>> wrapping wire to joint TP14 to TP33 so the 1PPS will be at J5.  I 
>>>>>> think that I will do the modification this weekend.
>>>>>> I don't imagine any future use of the X8 Chip signal but having 
>>>>>> the even second output could be useful, at least to see the 
>>>>>> difference with the 1 PPS.
>>>>>> I had not measured the time difference yet, but I made a partial 
>>>>>> schematic of the board for my troubleshooting and there I see 
>>>>>> that the 1/2 PPS signal is synchronized with the 19.6608 signal 
>>>>>> that is the source for the 8X Chip ( 9.8304 MHz), this is done in 
>>>>>> U405B . The period of this signal is about 50 ns and this is the 
>>>>>> origin of the 1/2 PPS width.  The 19.6608 MHz oscillator is phase 
>>>>>> locked somewhere to the 10 MHz oscillator thus it is as stable as 
>>>>>> this one.
>>>>>> I think that using the other half of U405, which actually is used 
>>>>>> to divide by 2 the 19.6608 MHz signal, could render the 1 PPS 
>>>>>> synchronized with the 1/2 PPS and also with the same width. 
>>>>>> Probably the easier way to correct this is to use the command 
>>>>>> which sets the antenna cable delay and compensate for the 
>>>>>> difference.
>>>>>> I don't have a full schematic, even I am not sure that the 
>>>>>> partial one is 100% correct but I can send it to anyone who wants 
>>>>>> it.
>>>>>>
>>>>>> Regards,
>>>>>> Ignacio
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> El 10/06/2015 a las 6:30, Ed Armstrong wrote:
>>>>>>> Hi, this is my first post ever to a mailing list, so if I'm 
>>>>>>> doing anything wrong please be gentle with your corrections :-)
>>>>>>>
>>>>>>> A short time ago I purchased a Nortel/Trimble NTGS50AA GPSTM, 
>>>>>>> I'm sure many on this list are familiar with it. At the time of 
>>>>>>> purchase, my only interest was the 10 MHz output, for use with 
>>>>>>> my HP5328b frequency counter and perhaps in the future also my 
>>>>>>> signal generator. No question here, it just works great as is. 
>>>>>>> However, it certainly seems best to leave these devices powered 
>>>>>>> up all the time.
>>>>>>>
>>>>>>> OK, now were getting close to my question. The unit pulls about 
>>>>>>> 10-11 watts, which is really not very much. But it kinda bugs me 
>>>>>>> to have it sit there using electric and basically doing nothing 
>>>>>>> when I'm not using it. So, I bought a Raspberry Pi 2 with the 
>>>>>>> intent of using it as an NTP server. I can't really say I'm 
>>>>>>> enjoying my intro to Linux a whole lot, but I'll get there. It 
>>>>>>> still needs some work, but it does function with the PPS output 
>>>>>>> from an Adafruit ultimate GPS, which I bought for testing this 
>>>>>>> and possibly building my own GPSDO in the future.
>>>>>>>
>>>>>>> The NTGS50AA is a very capable device, but unfortunately it does 
>>>>>>> not have a PPS output. Instead it has an even second output, 
>>>>>>> which goes low for approximately 50 ns. The falling edge of this 
>>>>>>> pulse marks the beginning of the second. During my search for a 
>>>>>>> solution to this, I came across a post from this mailing list 
>>>>>>> which I believe was discussing repair of one of these units. 
>>>>>>> Someone in that post mentioned that there was a PPS signal at 
>>>>>>> test point 33 which went low for about 10 µs. Thank you, that 
>>>>>>> saves me a lot of probing.
>>>>>>>
>>>>>>> The first thing I did was verify that this pulse did exist, then 
>>>>>>> I decided to examine it a little closer. I kind of suspected 
>>>>>>> that it may have been a rather raw pulse as received from the 
>>>>>>> satellites. I found out that is not correct, once the unit 
>>>>>>> successfully phase locks, this PPS signal is very accurately 
>>>>>>> tied to the 10 MHz output, even when the unit goes into holdover 
>>>>>>> mode. I was very happy about this :-) Next step was to see how 
>>>>>>> accurately it was synced to the even second pulse. The bad news 
>>>>>>> is that it does not occur at exactly the same time as the even 
>>>>>>> second. The good news is that the offset is very consistent, 253 
>>>>>>> ns before the even second pulse, +/- 1 ns.
>>>>>>>
>>>>>>> My next step was to find out where the even second pulse entered 
>>>>>>> the output circuitry. I then broke the trace taking the even 
>>>>>>> second into the output circuitry, and ran a piece of 30gauge 
>>>>>>> wire wrapping wire from the via at test point 33 to the via at 
>>>>>>> the input to the output circuitry. The wire fit so perfectly it 
>>>>>>> felt like the vias were made for just this purpose :-) Now I've 
>>>>>>> got a very nice PPS signal available both at the front jack and 
>>>>>>> at the backplane connector in the rear of the unit.
>>>>>>>
>>>>>>> OK, here is the actual question. Do you think it is OK to 
>>>>>>> consider a pulse which arise 250 ns early to be close enough? 
>>>>>>> And no, I am not forgetting about that 3 ns, there is about 3 ns 
>>>>>>> of delay added by the output circuitry.
>>>>>>>
>>>>>>> Hope you didn't mind the long-winded post, and I thank you in 
>>>>>>> advance for any advice you offer.
>>>>>>>
>>>>>>>
>>>>>>> Ed
>>>>>>>
>>>> _
>>>
>>
>