[time-nuts] Software Sawtooth correction prerequisites?

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Tue Jul 31 18:51:05 EDT 2007

Henk ten Pierick wrote:
> On Jul 24, 2007, at 1:32, Dr Bruce Griffiths wrote:
>> Perhaps a software implementation of a 1 bit oversampled DAC the 1 bit
>> output of which is low pass filtered to control the EFC input is the
>> closest approach to this ideal.
>> With an appropriate algorithm the idle tone and inherent instability
>> problems (of high order modulators - 3rd or higher order) of the sigma
>> delta modulator will not occur.
> It is easy to design stable sigma delta converters of orders higher  
> than two. I have calculated a 7th order ADC which is implemented on  
> silicon and stable of coarse. A 11th order sigma delta with  
> oversampling ratio 128 is stable in simulation and has 228dB snr.  
> {This is no typo two hundred and twenty eight dB)
> Higher order sigma delta converter require higher order  
> reconstruction filters  but it is easy to design for more bandwidth  
> than needed and so to relax the filter spec.
> Henk

There is no theory to show that sigma delta modulators of order higher 
than 2 are actually unconditionally stable.
Merely simulating the device is not conclusive proof that the modulator 
will never saturate, albeit infrequently.
Most implementations include saturation detection circuitry that resets 
the modulator should this occur.
If saturation isn't too frequent then for most purposes this is only a 
minor annoyance.
However cascaded first order modulators as employed in the MASH 
technique are stable in theory and practice.

However if one adopts a non linear control theory approach, one can 
actually design high order modulators that both stable in theory and in 
The resulting circuit isn't a sigma delta modulator, however it has 
similar noise shaping characteristics.


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