[time-nuts] time-nuts Frequency Divider
Ulrich Bangert
df6jb at ulrich-bangert.de
Sat Apr 4 10:13:40 UTC 2009
Magnus,
> As a curiosity, there are various variants of the original 4046 which
> has different sensitivity on the input side... one of them
> has several inverters in a row to get the needed gain where as the other
variant
> does not. This difference made a huge difference in some applications.
are you going to say with that it would be reasonable to test different
brands for input sensivity? I have been believing that all brands have this
inverter chain.
Best regards
Ulrich
> -----Ursprungliche Nachricht-----
> Von: time-nuts-bounces at febo.com
> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Magnus Danielson
> Gesendet: Freitag, 3. April 2009 19:57
> An: Discussion of precise time and frequency measurement
> Betreff: Re: [time-nuts] time-nuts Frequency Divider
>
>
> Bruce Griffiths skrev:
> > Ulrich
> >
> > Your experience with the SR620 illustrates the point I was making
> > quite well. It really does matter what you do in front of
> the limiter
> > circuit built into the counter.
> > A bandpass or any other filter by itself is ineffective unless the
> > signal is exceptionally noisy.
> >
> > By using the inverter in the 74HCT4046 you have added a low gain
> > limiter stage the bandwidth of which is smaller than that
> of the SR620
> > input circuit. This has the effect of increasing the slew
> rate of the
> > input signal whilst producing an output with less jitter than the
> > SR620 input circuit would without this low pass filtered limiter
> > circuit (the inverter from the 74HCT4046). The slew rate at the
> > 74HCT4046 inverter output is greater than that of the input signal
> > which means that the jitter due the counter input circuit noise is
> > smaller than when this low gain low bandwidth limiter isn't used.
> > The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz
> > assuming a single pole response with a 300MHz 3dB high
> frequency cutoff)
> > and a correspondingly high total input noise (~350uV rms).
> > If the slew rate of the SR 620 input signal at the trigger point the
> > jitter due to this noise dominates the trigger circuit
> output jitter.
> > The HP5370 time interval counter input circuit has a lower noise
> > bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input
> > circuit of the SR620 and thus the HP5370 jitter (without
> the 74HCT4046
> > limiter) for the same 10MHz signal should be less than that
> of the SR620
> > (without the 74HCT4046 limiter).
>
> As a curiosity, there are various variants of the original 4046 which
> has different sensitivity on the input side... one of them
> has several
> inverters in a row to get the needed gain where as the other variant
> does not. This difference made a huge difference in some applications.
>
> > If one uses a state of the art trigger circuit with a noise
> bandwidth
> > of 1GHz or more then the total input noise will be even
> larger so it
> > becomes even more important to use an optimised cascade of limiter+
> > low output pass filter stages to increase the slew rate of
> the counter
> > input trigger circuit at the trigger threshold. Careful
> optimisation
> > of the gain of each stage and the corresponding output
> filter cutoff
> > frequency for each stage is necessary to minimise the
> output jitter of
> > the counter trigger circuit. There is also an optimum
> number of such
> > stages that minimises the trigger jitter.
> >
> > The optimisation problem for Limiter stages with gaussian wideband
> > input noise was solved in the 1990's. Unfortunately the
> optimum number
> > of stages, associated gains and output filter bandwidths depends on
> > the input signal frequency and amplitude so that in general
> it isn't
> > possible to use the same limiter cascade for a wide range of signal
> > amplitudes and frequencies and minimise the jitter for each
> frequency
> > and amplitude.
>
> Actually, you can make a cascade setup which is approaching
> optimum and insert signal at the stage where the signals
> slewrate matches the range
> for each stage. Since the gain steps is larger later in a slew rate
> amplifier chain, the last stages may have a little coarse slew rate
> range, but additional mid-range amplifiers that can act as
> alternative
> input amps could curcumvent that such that a wide range but
> and fairly
> good trigger jitter could be achieved.
>
> The comparator level is fed to whatever stage is the first stage.
>
> Such an approach could lead to much improved jitter values for lower
> frequency signals with associated gain in measurement accuracy.
>
> It is easy to make a pre-amplifier set that achieves this,
> but you want
> to integrate the control algorithms for automatic use.
>
> > Thus such circuits aren't usually employed in general purpose
> > frequency counters.
>
> Certainly true. A generic counter is usually equipped with
> triggers such
> that they can measure slewrate without too much difficulty.
>
> > However if the input signal frequency and amplitude are known and
> > stable then using such a limiter filter cascade is feasible.
>
> Indeed.
>
> Cheers,
> Magnus
>
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