[time-nuts] femtosecond jitter anyone?

Magnus Danielson magnus at rubidium.dyndns.org
Wed Apr 8 21:09:28 UTC 2009

Chris Mack / N1SKY skrev:
> Hello fellow time nuts,
> Have a project here with an OCXO from Vectron at 38.88MHz being the  
> "jitter reference" for a DSP based PLL.
> The Vectron part has a little bit of close-in phase noise below 12kHz  
> of BW.   Is there a way to filter this, say by driving an external  
> (temperature stabilized) crystal "backwards" (in the non-traditional  
> sense rather than using the crystal to provide a clock for a system)  
> and recovering the signal?
> Also the output of the Vectron part is square and it would be ideal  
> to distribute a sine wave....
> I cannot find traditional crystal filters that have a direct center  
> at 38.88MHz also with any usable bandwidth (for the close-in skirt)  
> for this application.
> The DSP PLL has "femtosecond" jitter capabilities depending on how it  
> is applied, e.g., for SONET and the like and also depending upon  
> measurement BW used.  Also the jitter reference comes into play here  
> as well....
> For the sampling application this is being used for, it would be  
> ideal (by design) to keep the timing uncertainty below 0.45ps or so...
> Any thoughts?

Do you want to apply jitter to the 38,88 MHz clock?

In particular, do you want to be able to modulate it with various 
amounts of sine in order to test jitter tolerance (a common SDH/SONET 

Essentially you want phase modulations for those purposes. You can apply 
them on the output signal for smaller amounts, but for larger deviations 
it is not as convenient. Tolerance modulations may need to be several 
cycles peak-to-peak. A combination of phase modulation and frequency 
modulation can be used. One approach is to phase lock the oscillator to 
a reference and insert the modulation signal into the PLL loop.


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