[time-nuts] DDS'ery narrow scoped.

[ehydra]

That is maybe interesting to you:
http://www.holmea.demon.co.uk/Projects.htm#Frac

- Henry

-- 
ehydra.dyndns.info


Luis Cupido schrieb:
> P.S. At the moment I'm testing on the bench with a real FPGA cyclone III
> with a 48bit dds at 100MHz fclock and at circa 6 and 18MHz output and it 
> is not that bad. I got better than -60dBc in the desired ranges.
> So not too unhappy for a start ;-) PLL cleans 99% of it...
> but the close in spurs are annoying.