[time-nuts] TIC model

[Bob Stewart]

Now you've lost me.  What 2.5 MHz synchronizer clock?  Everything I have external to the PIC is 10MHz.  The PIC is running HSPLL at 40MHz, though I don't think that makes any difference to this.

Bob




>________________________________
> From: Bruce Griffiths <bruce.griffiths at xtra.co.nz>
>To: Bob Stewart <bob at evoria.net>; Discussion of precise time and frequency measurement <time-nuts at febo.com> 
>Sent: Thursday, February 20, 2014 3:07 AM
>Subject: Re: [time-nuts] TIC model
> 
>
>R2 is dominated by the adc sample switch on resistance and thus has a 
>relatively high  tempco (~4000ppm/C).
>C2 has a relatively low tempco (~100ppm/C or so)
>
>To reduce the effect of the sample switch on resistance tempco on the 
>gain tempco of the TIC R1 C1 need to be proportioned so that R2 has 
>little effect on the gain temcpo.
>R1 = 470 ohm, C1 = 1nF (NPO) appears to be about right for a 2.5MHz 
>synchroniser clock and the PIC you intend to use.
>
>This should reduce the effect of the sample switch on resistance tempco 
>by a factor of 10 or more.
>
>The minimum value of R1 is governed by the output resistance of the 
>tristate buffer and its tempco.
>
>Bruce
>
>